[mlir][openacc] Add init operation

This patch introduces the init operation that represents the init executable directive
from the OpenACC 3.0 specifications.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88254
This commit is contained in:
Valentin Clement 2020-09-29 10:58:46 -04:00 committed by clementval
parent 7a55989dc4
commit 51323fe2b8
4 changed files with 87 additions and 0 deletions

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@ -318,6 +318,36 @@ def OpenACC_YieldOp : OpenACC_Op<"yield", [Terminator,
let assemblyFormat = "attr-dict ($operands^ `:` type($operands))?";
}
//===----------------------------------------------------------------------===//
// 2.14.1. Init Directive
//===----------------------------------------------------------------------===//
def OpenACC_InitOp : OpenACC_Op<"init", [AttrSizedOperandSegments]> {
let summary = "init operation";
let description = [{
The "acc.init" operation represents the OpenACC init executable
directive.
Example:
```mlir
acc.init
acc.init device_num(%dev1 : i32)
```
}];
let arguments = (ins Variadic<AnyInteger>:$deviceTypeOperands,
Optional<IntOrIndex>:$deviceNumOperand,
Optional<I1>:$ifCond);
let assemblyFormat = [{
( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
}];
}
//===----------------------------------------------------------------------===//
// 2.14.4. Update Directive
//===----------------------------------------------------------------------===//

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@ -648,6 +648,19 @@ static LogicalResult verify(acc::DataOp dataOp) {
return success();
}
//===----------------------------------------------------------------------===//
// InitOp
//===----------------------------------------------------------------------===//
static LogicalResult verify(acc::InitOp initOp) {
Operation *currOp = initOp;
while ((currOp = currOp->getParentOp())) {
if (isa<acc::ParallelOp>(currOp) || isa<acc::LoopOp>(currOp))
return initOp.emitOpError("cannot be nested in a compute operation");
}
return success();
}
//===----------------------------------------------------------------------===//
// UpdateOp
//===----------------------------------------------------------------------===//

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@ -111,3 +111,19 @@ acc.wait wait_devnum(%cst: index)
%cst = constant 1 : index
// expected-error@+1 {{async attribute cannot appear with asyncOperand}}
acc.wait async(%cst: index) attributes {async}
// -----
acc.parallel {
// expected-error@+1 {{'acc.init' op cannot be nested in a compute operation}}
acc.init
acc.yield
}
// -----
acc.loop {
// expected-error@+1 {{'acc.init' op cannot be nested in a compute operation}}
acc.init
acc.yield
}

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@ -592,3 +592,31 @@ acc.wait if(%ifCond)
// CHECK: acc.wait attributes {async}
// CHECK: acc.wait([[I64VALUE]] : i64) async([[IDXVALUE]] : index) wait_devnum([[I32VALUE]] : i32)
// CHECK: acc.wait if([[IFCOND]])
// -----
%i64Value = constant 1 : i64
%i32Value = constant 1 : i32
%i32Value2 = constant 2 : i32
%idxValue = constant 1 : index
%ifCond = constant true
acc.init
acc.init device_type(%i32Value : i32)
acc.init device_type(%i32Value, %i32Value2 : i32, i32)
acc.init device_num(%i64Value : i64)
acc.init device_num(%i32Value : i32)
acc.init device_num(%idxValue : index)
acc.init if(%ifCond)
// CHECK: [[I64VALUE:%.*]] = constant 1 : i64
// CHECK: [[I32VALUE:%.*]] = constant 1 : i32
// CHECK: [[I32VALUE2:%.*]] = constant 2 : i32
// CHECK: [[IDXVALUE:%.*]] = constant 1 : index
// CHECK: [[IFCOND:%.*]] = constant true
// CHECK: acc.init
// CHECK: acc.init device_type([[I32VALUE]] : i32)
// CHECK: acc.init device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
// CHECK: acc.init device_num([[I64VALUE]] : i64)
// CHECK: acc.init device_num([[I32VALUE]] : i32)
// CHECK: acc.init device_num([[IDXVALUE]] : index)
// CHECK: acc.init if([[IFCOND]])