forked from OSchip/llvm-project
[NVPTX] Add ex2.approx.f16/f16x2 support
NOTE: this is a follow-up commit with the missing clang-side changes. This patch adds builtins and intrinsics for the f16 and f16x2 variants of the ex2 instruction. These two variants were added in PTX7.0, and are supported by sm_75 and above. Note that this isn't wired with the exp2 llvm intrinsic because the ex2 instruction is only available in its approx variant. Running ptxas on the assembly generated by the test f16-ex2.ll works as expected. Differential Revision: https://reviews.llvm.org/D119157
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@ -282,6 +282,8 @@ BUILTIN(__nvvm_saturate_d, "dd", "")
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BUILTIN(__nvvm_ex2_approx_ftz_f, "ff", "")
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BUILTIN(__nvvm_ex2_approx_f, "ff", "")
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BUILTIN(__nvvm_ex2_approx_d, "dd", "")
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TARGET_BUILTIN(__nvvm_ex2_approx_f16, "hh", "", AND(SM_75, PTX70))
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TARGET_BUILTIN(__nvvm_ex2_approx_f16x2, "V2hV2h", "", AND(SM_75, PTX70))
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BUILTIN(__nvvm_lg2_approx_ftz_f, "ff", "")
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BUILTIN(__nvvm_lg2_approx_f, "ff", "")
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@ -1,4 +1,9 @@
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// REQUIRES: nvptx-registered-target
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//
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// RUN: %clang_cc1 -ffp-contract=off -triple nvptx-unknown-unknown -target-cpu \
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// RUN: sm_75 -target-feature +ptx70 -fcuda-is-device -fnative-half-type -S \
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// RUN: -emit-llvm -o - -x cuda %s \
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// RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK_PTX70_SM75 %s
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// RUN: %clang_cc1 -ffp-contract=off -triple nvptx-unknown-unknown -target-cpu \
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// RUN: sm_80 -target-feature +ptx70 -fcuda-is-device -fnative-half-type -S \
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@ -32,6 +37,16 @@
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#define __device__ __attribute__((device))
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__device__ void nvvm_ex2_sm75() {
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#if __CUDA_ARCH__ >= 750
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// CHECK_PTX70_SM75: call half @llvm.nvvm.ex2.approx.f16
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__nvvm_ex2_approx_f16(0.1f16);
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// CHECK_PTX70_SM75: call <2 x half> @llvm.nvvm.ex2.approx.f16x2
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__nvvm_ex2_approx_f16x2({0.1f16, 0.7f16});
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#endif
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// CHECK: ret void
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}
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// CHECK-LABEL: nvvm_min_max_sm80
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__device__ void nvvm_min_max_sm80() {
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#if __CUDA_ARCH__ >= 800
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