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[test] Regenerate checks in aarch64_win64cc_vararg.ll with update_llc_test_checks.py. NFC.
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llvm/test/CodeGen/AArch64
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@ -1,20 +1,23 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
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define win64cc void @pass_va(i32 %count, ...) nounwind {
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; CHECK-LABEL: pass_va:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #96 // =96
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; CHECK-NEXT: add x8, sp, #40 // =40
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; CHECK-NEXT: add x0, sp, #40 // =40
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; CHECK-NEXT: stp x30, x18, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp x1, x2, [sp, #40]
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; CHECK-NEXT: stp x3, x4, [sp, #56]
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; CHECK-NEXT: stp x5, x6, [sp, #72]
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; CHECK-NEXT: str x7, [sp, #88]
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: bl other_func
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; CHECK-NEXT: ldp x30, x18, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: add sp, sp, #96 // =96
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; CHECK-NEXT: ret
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entry:
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; CHECK: sub sp, sp, #96
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; CHECK: add x8, sp, #40
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; CHECK: add x0, sp, #40
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; CHECK: stp x30, x18, [sp, #16]
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; CHECK: stp x1, x2, [sp, #40]
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; CHECK: stp x3, x4, [sp, #56]
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; CHECK: stp x5, x6, [sp, #72]
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; CHECK: str x7, [sp, #88]
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; CHECK: str x8, [sp, #8]
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; CHECK: bl other_func
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; CHECK: ldp x30, x18, [sp, #16]
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; CHECK: add sp, sp, #96
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; CHECK: ret
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap1)
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@ -28,14 +31,15 @@ declare void @other_func(i8*) local_unnamed_addr
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_copy(i8*, i8*) nounwind
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; CHECK-LABEL: f9:
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; CHECK: str x18, [sp, #-16]!
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; CHECK: add x8, sp, #24
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; CHECK: add x0, sp, #24
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; CHECK: str x8, [sp, #8]
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; CHECK: ldr x18, [sp], #16
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; CHECK: ret
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define win64cc i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
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; CHECK-LABEL: f9:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x18, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: add x8, sp, #24 // =24
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; CHECK-NEXT: add x0, sp, #24 // =24
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: ldr x18, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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@ -44,14 +48,15 @@ entry:
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ret i8* %ap2
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}
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; CHECK-LABEL: f8:
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; CHECK: str x18, [sp, #-16]!
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; CHECK: add x8, sp, #16
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; CHECK: add x0, sp, #16
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; CHECK: str x8, [sp, #8]
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; CHECK: ldr x18, [sp], #16
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; CHECK: ret
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define win64cc i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
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; CHECK-LABEL: f8:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x18, [sp, #-16]! // 8-byte Folded Spill
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; CHECK-NEXT: add x8, sp, #16 // =16
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; CHECK-NEXT: add x0, sp, #16 // =16
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: ldr x18, [sp], #16 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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@ -60,15 +65,16 @@ entry:
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ret i8* %ap2
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}
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; CHECK-LABEL: f7:
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; CHECK: str x18, [sp, #-32]!
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; CHECK: add x8, sp, #24
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; CHECK: str x7, [sp, #24]
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; CHECK: add x0, sp, #24
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; CHECK: str x8, [sp, #8]
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; CHECK: ldr x18, [sp], #32
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; CHECK: ret
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define win64cc i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
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; CHECK-LABEL: f7:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: str x18, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-NEXT: add x8, sp, #24 // =24
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; CHECK-NEXT: str x7, [sp, #24]
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; CHECK-NEXT: add x0, sp, #24 // =24
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; CHECK-NEXT: str x8, [sp, #8]
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; CHECK-NEXT: ldr x18, [sp], #32 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%ap = alloca i8*, align 8
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%ap1 = bitcast i8** %ap to i8*
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