maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Replace custom fixed endian to raw_ostream emission with EndianStream. 

Less code, clearer and more efficient. No functionality change intended.

llvm-svn: 239040
This commit is contained in:
Benjamin Kramer 2015-06-04 15:03:02 +00:00
parent 7884c95c7e
commit 50e2a29385
6 changed files with 28 additions and 99 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -174,16 +175,6 @@ public:
unsigned fixMOVZ(const MCInst &MI, unsigned EncodedValue,
const MCSubtargetInfo &STI) const;
void EmitByte(unsigned char C, raw_ostream &OS) const { OS << (char)C; }
void EmitConstant(uint64_t Val, unsigned Size, raw_ostream &OS) const {
// Output the constant in little endian byte order.
for (unsigned i = 0; i != Size; ++i) {
EmitByte(Val & 255, OS);
Val >>= 8;
}
}
void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@ -611,7 +602,7 @@ void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
}
uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI);
EmitConstant(Binary, 4, OS);
support::endian::Writer<support::little>(OS).write<uint32_t>(Binary);
++MCNumEmitted; // Keep track of the # of mi's emitted.
}

53
llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
View File

@ -91,59 +91,32 @@ unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
return 0;
}
// Emit one byte through output stream
void EmitByte(unsigned char C, unsigned &CurByte, raw_ostream &OS) {
OS << (char)C;
++CurByte;
}
// Emit a series of bytes (little endian)
void EmitLEConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
raw_ostream &OS) {
assert(Size <= 8 && "size too big in emit constant");
for (unsigned i = 0; i != Size; ++i) {
EmitByte(Val & 255, CurByte, OS);
Val >>= 8;
}
}
// Emit a series of bytes (big endian)
void EmitBEConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
raw_ostream &OS) {
assert(Size <= 8 && "size too big in emit constant");
for (int i = (Size - 1) * 8; i >= 0; i -= 8)
EmitByte((Val >> i) & 255, CurByte, OS);
}
void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode();
// Keep track of the current byte being emitted
unsigned CurByte = 0;
support::endian::Writer<support::little> LE(OS);
if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
EmitByte(Value >> 56, CurByte, OS);
EmitByte(((Value >> 48) & 0xff), CurByte, OS);
EmitLEConstant(0, 2, CurByte, OS);
EmitLEConstant(Value & 0xffffFFFF, 4, CurByte, OS);
LE.write<uint8_t>(Value >> 56);
LE.write<uint8_t>(((Value >> 48) & 0xff));
LE.write<uint16_t>(0);
LE.write<uint32_t>(Value & 0xffffFFFF);
const MCOperand &MO = MI.getOperand(1);
uint64_t Imm = MO.isImm() ? MO.getImm() : 0;
EmitByte(0, CurByte, OS);
EmitByte(0, CurByte, OS);
EmitLEConstant(0, 2, CurByte, OS);
EmitLEConstant(Imm >> 32, 4, CurByte, OS);
LE.write<uint8_t>(0);
LE.write<uint8_t>(0);
LE.write<uint16_t>(0);
LE.write<uint32_t>(Imm >> 32);
} else {
// Get instruction encoding and emit it
uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
EmitByte(Value >> 56, CurByte, OS);
EmitByte((Value >> 48) & 0xff, CurByte, OS);
EmitLEConstant((Value >> 32) & 0xffff, 2, CurByte, OS);
EmitLEConstant(Value & 0xffffFFFF, 4, CurByte, OS);
LE.write<uint8_t>(Value >> 56);
LE.write<uint8_t>((Value >> 48) & 0xff);
LE.write<uint16_t>((Value >> 32) & 0xffff);
LE.write<uint32_t>(Value & 0xffffFFFF);
}
}

12
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
#define DEBUG_TYPE "mccodeemitter"
@ -31,15 +32,6 @@ using namespace Hexagon;
STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
namespace {
void emitLittleEndian(uint64_t Binary, raw_ostream &OS) {
OS << static_cast<uint8_t>((Binary >> 0x00) & 0xff);
OS << static_cast<uint8_t>((Binary >> 0x08) & 0xff);
OS << static_cast<uint8_t>((Binary >> 0x10) & 0xff);
OS << static_cast<uint8_t>((Binary >> 0x18) & 0xff);
}
}
HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII,
MCContext &aMCT)
: MCT(aMCT), MCII(aMII), Addend(new unsigned(0)),
@ -157,7 +149,7 @@ void HexagonMCCodeEmitter::EncodeSingleInstruction(
llvm_unreachable("Unimplemented Instruction");
}
Binary |= Parse;
emitLittleEndian(Binary, OS);
support::endian::Writer<support::little>(OS).write<uint32_t>(Binary);
++MCNumEmitted;
}

30
llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOpcodes.h"
@ -116,38 +117,19 @@ public:
switch (Size) {
case 4:
if (IsLittleEndian) {
OS << (char)(Bits);
OS << (char)(Bits >> 8);
OS << (char)(Bits >> 16);
OS << (char)(Bits >> 24);
support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);
} else {
OS << (char)(Bits >> 24);
OS << (char)(Bits >> 16);
OS << (char)(Bits >> 8);
OS << (char)(Bits);
support::endian::Writer<support::big>(OS).write<uint32_t>(Bits);
}
break;
case 8:
// If we emit a pair of instructions, the first one is
// always in the top 32 bits, even on little-endian.
if (IsLittleEndian) {
OS << (char)(Bits >> 32);
OS << (char)(Bits >> 40);
OS << (char)(Bits >> 48);
OS << (char)(Bits >> 56);
OS << (char)(Bits);
OS << (char)(Bits >> 8);
OS << (char)(Bits >> 16);
OS << (char)(Bits >> 24);
uint64_t Swapped = (Bits << 32) | (Bits >> 32);
support::endian::Writer<support::little>(OS).write<uint64_t>(Swapped);
} else {
OS << (char)(Bits >> 56);
OS << (char)(Bits >> 48);
OS << (char)(Bits >> 40);
OS << (char)(Bits >> 32);
OS << (char)(Bits >> 24);
OS << (char)(Bits >> 16);
OS << (char)(Bits >> 8);
OS << (char)(Bits);
support::endian::Writer<support::big>(OS).write<uint64_t>(Bits);
}
break;
default:

9
llvm/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
View File

@ -23,6 +23,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
@ -148,15 +149,11 @@ void R600MCCodeEmitter::EmitByte(unsigned int Byte, raw_ostream &OS) const {
}
void R600MCCodeEmitter::Emit(uint32_t Value, raw_ostream &OS) const {
for (unsigned i = 0; i < 4; i++) {
OS.write((uint8_t) ((Value >> (8 * i)) & 0xff));
}
support::endian::Writer<support::little>(OS).write(Value);
}
void R600MCCodeEmitter::Emit(uint64_t Value, raw_ostream &OS) const {
for (unsigned i = 0; i < 8; i++) {
EmitByte((Value >> (8 * i)) & 0xff, OS);
}
support::endian::Writer<support::little>(OS).write(Value);
}
unsigned R600MCCodeEmitter::getHWRegChan(unsigned reg) const {

10
llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
View File

@ -86,16 +86,10 @@ void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
if (Ctx.getAsmInfo()->isLittleEndian()) {
// Output the bits in little-endian byte order.
for (unsigned i = 0; i != 4; ++i) {
OS << (char)Bits;
Bits >>= 8;
}
support::endian::Writer<support::little>(OS).write<uint32_t>(Bits);
} else {
// Output the bits in big-endian byte order.
for (unsigned i = 0; i != 4; ++i) {
OS << (char)(Bits >> 24);
Bits <<= 8;
}
support::endian::Writer<support::big>(OS).write<uint32_t>(Bits);
}
unsigned tlsOpNo = 0;
switch (MI.getOpcode()) {