forked from OSchip/llvm-project
[CostModel] remove cost-kind predicate for FP add/mul vector reduction costs
This was originally part of:f2c25c7079
but that was reverted because there was an underlying bug in processing the vector type of these intrinsics. That was fixed with:74ffc823ed
This is similar in spirit to01ea93d85d
(memcpy) except that here the underlying caller assumptions were created for vectorizer use (throughput) rather than other passes. That meant targets could have an enormous throughput cost with no corresponding size, latency, or blended cost increase. Paraphrasing from the previous commits: This may not make sense for some callers, but at least now the costs will be consistently wrong instead of mysteriously wrong. Targets should provide better overrides if the current modeling is not accurate.
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@ -1205,11 +1205,8 @@ public:
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}
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case Intrinsic::vector_reduce_fadd:
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case Intrinsic::vector_reduce_fmul: {
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// FIXME: all cost kinds should default to the same thing?
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if (CostKind != TTI::TCK_RecipThroughput)
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return BaseT::getIntrinsicInstrCost(ICA, CostKind);
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IntrinsicCostAttributes Attrs(
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IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, 1, I);
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IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, 1, I);
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return getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
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}
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case Intrinsic::fshl:
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@ -236,11 +236,11 @@ define void @reduce_fmul(<16 x float> %va) {
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; LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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; SIZE-LABEL: 'reduce_fmul'
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; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v = call float @llvm.vector.reduce.fmul.v16f32(float 4.200000e+01, <16 x float> %va)
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; SIZE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v = call float @llvm.vector.reduce.fmul.v16f32(float 4.200000e+01, <16 x float> %va)
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; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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; SIZE_LATE-LABEL: 'reduce_fmul'
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v = call float @llvm.vector.reduce.fmul.v16f32(float 4.200000e+01, <16 x float> %va)
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v = call float @llvm.vector.reduce.fmul.v16f32(float 4.200000e+01, <16 x float> %va)
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%v = call float @llvm.vector.reduce.fmul.v16f32(float 42.0, <16 x float> %va)
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@ -257,11 +257,11 @@ define void @reduce_fadd_fast(<16 x float> %va) {
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; LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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; SIZE-LABEL: 'reduce_fadd_fast'
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; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v = call fast float @llvm.vector.reduce.fadd.v16f32(float 0.000000e+00, <16 x float> %va)
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; SIZE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v = call fast float @llvm.vector.reduce.fadd.v16f32(float 0.000000e+00, <16 x float> %va)
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; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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; SIZE_LATE-LABEL: 'reduce_fadd_fast'
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v = call fast float @llvm.vector.reduce.fadd.v16f32(float 0.000000e+00, <16 x float> %va)
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %v = call fast float @llvm.vector.reduce.fadd.v16f32(float 0.000000e+00, <16 x float> %va)
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; SIZE_LATE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%v = call fast float @llvm.vector.reduce.fadd.v16f32(float 0.0, <16 x float> %va)
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