forked from OSchip/llvm-project
parent
c7852a689a
commit
50b6730ae4
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@ -161,6 +161,9 @@ let Namespace = "X86" in {
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def ST5 : Register<"ST(5)">, DwarfRegNum<16>;
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def ST6 : Register<"ST(6)">, DwarfRegNum<17>;
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def ST7 : Register<"ST(7)">, DwarfRegNum<18>;
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// Status flags register
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def EFLAGS : Register<"EFLAGS">;
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}
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@ -516,3 +519,6 @@ def VR128 : RegisterClass<"X86", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],128,
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}
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}];
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}
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// Status flags registers.
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def CCR : RegisterClass<"X86", [i32], 32, [EFLAGS]>;
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