forked from OSchip/llvm-project
[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
This is preparation to reduce TargetInstrInfo.h dependencies. llvm-svn: 294084
This commit is contained in:
Eugene Zelenko
parent
aa741abfc5
commit
502d0bc28e
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@ -11,40 +11,63 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "ScheduleDAGSDNodes.h"
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#include "SelectionDAGBuilder.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/None.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/BranchProbabilityInfo.h"
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#include "llvm/Analysis/CFG.h"
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#include "llvm/Analysis/EHPersonalities.h"
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#include "llvm/Analysis/TargetLibraryInfo.h"
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#include "llvm/CodeGen/FastISel.h"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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#include "llvm/CodeGen/GCMetadata.h"
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#include "llvm/CodeGen/GCStrategy.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/MachineOperand.h"
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#include "llvm/CodeGen/MachinePassRegistry.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/CodeGen/MachineValueType.h"
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#include "llvm/CodeGen/SchedulerRegistry.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/CodeGen/StackProtector.h"
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#include "llvm/CodeGen/WinEHFuncInfo.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/IR/DebugLoc.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/InlineAsm.h"
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#include "llvm/IR/InstrTypes.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/IR/Metadata.h"
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#include "llvm/IR/Type.h"
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#include "llvm/IR/User.h"
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#include "llvm/MC/MCInstrDesc.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/BranchProbability.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/CodeGen.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -59,6 +82,13 @@
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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#include <algorithm>
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#include <cassert>
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#include <cstdint>
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#include <iterator>
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#include <memory>
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#include <string>
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#include <utility>
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#include <vector>
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using namespace llvm;
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@ -238,7 +268,7 @@ MachinePassRegistry RegisterScheduler::Registry;
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///
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//===---------------------------------------------------------------------===//
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static cl::opt<RegisterScheduler::FunctionPassCtor, false,
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RegisterPassParser<RegisterScheduler> >
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RegisterPassParser<RegisterScheduler>>
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ISHeuristic("pre-RA-sched",
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cl::init(&createDefaultScheduler), cl::Hidden,
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cl::desc("Instruction schedulers available (before register"
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@ -249,6 +279,7 @@ defaultListDAGScheduler("default", "Best scheduler for the target",
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createDefaultScheduler);
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namespace llvm {
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//===--------------------------------------------------------------------===//
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/// \brief This class is used by SelectionDAGISel to temporarily override
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/// the optimization level on a per-function basis.
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@ -318,6 +349,7 @@ namespace llvm {
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"Unknown sched type!");
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return createILPListDAGScheduler(IS, OptLevel);
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}
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} // end namespace llvm
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// EmitInstrWithCustomInserter - This method should be implemented by targets
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@ -628,7 +660,7 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) {
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unsigned To = I->second;
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// If To is also scheduled to be replaced, find what its ultimate
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// replacement is.
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for (;;) {
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while (true) {
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DenseMap<unsigned, unsigned>::iterator J = FuncInfo->RegFixups.find(To);
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if (J == E) break;
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To = J->second;
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@ -907,10 +939,12 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
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}
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namespace {
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/// ISelUpdater - helper class to handle updates of the instruction selection
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/// graph.
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class ISelUpdater : public SelectionDAG::DAGUpdateListener {
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SelectionDAG::allnodes_iterator &ISelPosition;
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public:
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ISelUpdater(SelectionDAG &DAG, SelectionDAG::allnodes_iterator &isp)
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: SelectionDAG::DAGUpdateListener(DAG), ISelPosition(isp) {}
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@ -923,6 +957,7 @@ public:
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++ISelPosition;
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}
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};
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} // end anonymous namespace
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static bool isStrictFPOp(SDNode *Node, unsigned &NewOpc) {
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@ -1113,7 +1148,7 @@ static bool isFoldedOrDeadInstruction(const Instruction *I,
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// will not add up to what is reported by NumFastIselFailures.
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static void collectFailStats(const Instruction *I) {
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switch (I->getOpcode()) {
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default: assert (0 && "<Invalid operator> ");
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default: assert(false && "<Invalid operator>");
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// Terminators
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case Instruction::Ret: NumFastIselFailRet++; return;
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@ -2237,7 +2272,6 @@ bool SelectionDAGISel::IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
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IgnoreChains = false;
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}
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SmallPtrSet<SDNode*, 16> Visited;
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return !findNonImmUse(Root, N.getNode(), U, Root, Visited, IgnoreChains);
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}
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@ -2614,7 +2648,7 @@ MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
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LLVM_ATTRIBUTE_ALWAYS_INLINE static inline bool
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CheckSame(const unsigned char *MatcherTable, unsigned &MatcherIndex,
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SDValue N,
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const SmallVectorImpl<std::pair<SDValue, SDNode*> > &RecordedNodes) {
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const SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes) {
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// Accept if it is exactly the same as a previously recorded node.
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unsigned RecNo = MatcherTable[MatcherIndex++];
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assert(RecNo < RecordedNodes.size() && "Invalid CheckSame");
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@ -2624,9 +2658,9 @@ CheckSame(const unsigned char *MatcherTable, unsigned &MatcherIndex,
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/// CheckChildSame - Implements OP_CheckChildXSame.
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LLVM_ATTRIBUTE_ALWAYS_INLINE static inline bool
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CheckChildSame(const unsigned char *MatcherTable, unsigned &MatcherIndex,
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SDValue N,
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const SmallVectorImpl<std::pair<SDValue, SDNode*> > &RecordedNodes,
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unsigned ChildNo) {
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SDValue N,
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const SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes,
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unsigned ChildNo) {
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if (ChildNo >= N.getNumOperands())
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return false; // Match fails if out of range child #.
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return ::CheckSame(MatcherTable, MatcherIndex, N.getOperand(ChildNo),
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@ -2748,7 +2782,7 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
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unsigned Index, SDValue N,
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bool &Result,
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const SelectionDAGISel &SDISel,
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SmallVectorImpl<std::pair<SDValue, SDNode*> > &RecordedNodes) {
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SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes) {
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switch (Table[Index++]) {
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default:
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Result = false;
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@ -2816,6 +2850,7 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
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}
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namespace {
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struct MatchScope {
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/// FailIndex - If this match fails, this is the index to continue with.
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unsigned FailIndex;
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@ -2845,6 +2880,7 @@ class MatchStateUpdater : public SelectionDAG::DAGUpdateListener
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SDNode **NodeToMatch;
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SmallVectorImpl<std::pair<SDValue, SDNode *>> &RecordedNodes;
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SmallVectorImpl<MatchScope> &MatchScopes;
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public:
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MatchStateUpdater(SelectionDAG &DAG, SDNode **NodeToMatch,
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SmallVectorImpl<std::pair<SDValue, SDNode *>> &RN,
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@ -2876,6 +2912,7 @@ public:
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J.setNode(E);
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}
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};
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} // end anonymous namespace
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void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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@ -2981,7 +3018,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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// with an OPC_SwitchOpcode instruction. Populate the table now, since this
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// is the first time we're selecting an instruction.
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unsigned Idx = 1;
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while (1) {
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while (true) {
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// Get the size of this case.
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unsigned CaseSize = MatcherTable[Idx++];
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if (CaseSize & 128)
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@ -3002,7 +3039,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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MatcherIndex = OpcodeOffset[N.getOpcode()];
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}
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while (1) {
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while (true) {
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assert(MatcherIndex < TableSize && "Invalid index");
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#ifndef NDEBUG
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unsigned CurrentOpcodeIndex = MatcherIndex;
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@ -3017,7 +3054,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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// immediately fail, don't even bother pushing a scope for them.
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unsigned FailIndex;
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while (1) {
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while (true) {
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unsigned NumToSkip = MatcherTable[MatcherIndex++];
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if (NumToSkip & 128)
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NumToSkip = GetVBR(NumToSkip, MatcherTable, MatcherIndex);
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@ -3178,7 +3215,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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unsigned CurNodeOpcode = N.getOpcode();
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unsigned SwitchStart = MatcherIndex-1; (void)SwitchStart;
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unsigned CaseSize;
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while (1) {
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while (true) {
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// Get the size of this case.
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CaseSize = MatcherTable[MatcherIndex++];
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if (CaseSize & 128)
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@ -3209,7 +3246,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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MVT CurNodeVT = N.getSimpleValueType();
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unsigned SwitchStart = MatcherIndex-1; (void)SwitchStart;
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unsigned CaseSize;
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while (1) {
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while (true) {
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// Get the size of this case.
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CaseSize = MatcherTable[MatcherIndex++];
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if (CaseSize & 128)
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@ -3533,7 +3570,6 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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RecordedNodes.push_back(std::pair<SDValue,SDNode*>(SDValue(Res, i),
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nullptr));
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}
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} else {
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assert(NodeToMatch->getOpcode() != ISD::DELETED_NODE &&
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"NodeToMatch was removed partway through selection");
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@ -3670,7 +3706,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
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// find a case to check.
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DEBUG(dbgs() << " Match failed at index " << CurrentOpcodeIndex << "\n");
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++NumDAGIselRetries;
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while (1) {
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while (true) {
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if (MatchScopes.empty()) {
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CannotYetSelect(NodeToMatch);
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return;
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