maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Migrate function attribute "no-frame-pointer-elim" to "frame-pointer"="all" as cleanups after D56351

This commit is contained in:
Fangrui Song 2019-12-24 15:52:21 -08:00
parent 3732f4e093
commit 502a77f125
497 changed files with 741 additions and 741 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
clang/test/CodeGen/backend-unsupported-error.ll
View File

@ -21,7 +21,7 @@ entry:
ret i32 %call, !dbg !15 ret i32 %call, !dbg !15
} }
attributes #0 = { nounwind noinline "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind noinline "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!9, !10} !llvm.module.flags = !{!9, !10}

2
lld/test/COFF/lto-cpu-string.ll
View File

@ -18,4 +18,4 @@ entry:
ret void ret void
} }
attributes #0 = { "no-frame-pointer-elim"="true" } attributes #0 = { "frame-pointer"="all" }

2
lld/test/ELF/lto/cpu-string.ll
View File

@ -22,4 +22,4 @@ entry:
ret void ret void
} }
attributes #0 = { "no-frame-pointer-elim"="true" } attributes #0 = { "frame-pointer"="all" }

2
llvm/docs/SourceLevelDebugging.rst
View File

@ -306,7 +306,7 @@ Compiled to LLVM, this function would be represented like this:
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1 declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

6
llvm/test/Analysis/BranchProbabilityInfo/pr22718.ll
View File

@ -73,9 +73,9 @@ declare i32 @rand() #1
declare i32 @printf(i8*, ...) #2 declare i32 @printf(i8*, ...) #2
attributes #0 = { inlinehint nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { inlinehint nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { nounwind } attributes #3 = { nounwind }
!llvm.ident = !{!0} !llvm.ident = !{!0}

2
llvm/test/Analysis/CostModel/SystemZ/intrinsic-cost-crash.ll
View File

@ -49,7 +49,7 @@ for.body: ; preds = %for.body, %for.body
} }
attributes #0 = { argmemonly nounwind } attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="penryn" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.ident = !{!0} !llvm.ident = !{!0}

4
llvm/test/Analysis/Delinearization/constant_functions_multi_dim.ll
View File

@ -64,8 +64,8 @@ declare i64 @_Z13get_global_idj(i32) #1
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare float @llvm.fmuladd.f32(float, float, float) #2 declare float @llvm.fmuladd.f32(float, float, float) #2
attributes #0 = { noinline nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { noinline nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone speculatable } attributes #2 = { nounwind readnone speculatable }
attributes #3 = { nounwind readnone } attributes #3 = { nounwind readnone }

2
llvm/test/Analysis/DependenceAnalysis/MIVCheckConst.ll
View File

@ -71,4 +71,4 @@ bb40:
ret void ret void
} }
attributes #0 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/Analysis/DependenceAnalysis/NonCanonicalizedSubscript.ll
View File

@ -96,7 +96,7 @@ for.end13: ; preds = %for.cond
ret void ret void
} }
attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+sse,+sse2" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.ident = !{!0} !llvm.ident = !{!0}

2
llvm/test/Analysis/MemorySSA/pr28880.ll
View File

@ -47,5 +47,5 @@ bb6: ; preds = %bb3
unreachable unreachable
} }
attributes #0 = { nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3" "unsafe-fp-math"="false" "use-soft-float"="false" }

4
llvm/test/Analysis/TypeBasedAliasAnalysis/PR17620.ll
View File

@ -27,8 +27,8 @@ entry:
declare void @callee(i32*, i32*) #1 declare void @callee(i32*, i32*) #1
attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { ssp uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.ident = !{!0} !llvm.ident = !{!0}

4
llvm/test/Bitcode/DILocation-implicit-code.ll
View File

@ -143,8 +143,8 @@ declare dso_local i8* @__cxa_allocate_exception(i64)
declare dso_local void @__cxa_throw(i8*, i8*, i8*) declare dso_local void @__cxa_throw(i8*, i8*, i8*)
attributes #0 = { noinline optnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { noinline optnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { noinline nounwind optnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { noinline nounwind optnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
attributes #3 = { noreturn nounwind } attributes #3 = { noreturn nounwind }
attributes #4 = { nounwind } attributes #4 = { nounwind }

2
llvm/test/Bitcode/drop-debug-info.3.5.ll
View File

@ -19,7 +19,7 @@ entry:
ret i32 0, !dbg !12 ret i32 0, !dbg !12
} }
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!9, !10} !llvm.module.flags = !{!9, !10}

2
llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
View File

@ -46,7 +46,7 @@
ret void ret void
} }
attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
attributes #2 = { optsize } attributes #2 = { optsize }
attributes #3 = { minsize } attributes #3 = { minsize }

2
llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
View File

@ -38,7 +38,7 @@
ret void ret void
} }
attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
... ...

2
llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
View File

@ -35,7 +35,7 @@
declare void @llvm.stackprotector(i8*, i8**) #2 declare void @llvm.stackprotector(i8*, i8**) #2
attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cyclone" "target-features"="+aes,+crypto,+fp-armv8,+neon,+sha2,+zcm,+zcz" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind } attributes #1 = { argmemonly nounwind }
... ...

2
llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll
View File

@ -37,7 +37,7 @@ for.body: ; preds = %for.body, %entry
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

4
llvm/test/CodeGen/AArch64/aarch64-a57-fp-load-balancing.ll
View File

@ -329,7 +329,7 @@ entry:
declare void @hhh(double, double) declare void @hhh(double, double)
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #2 = { nounwind } attributes #2 = { nounwind }

4
llvm/test/CodeGen/AArch64/aarch64-fix-cortex-a53-835769.ll
View File

@ -525,8 +525,8 @@ while.cond:
br label %while.cond br label %while.cond
} }
attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind } attributes #2 = { nounwind }

4
llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
View File

@ -79,8 +79,8 @@
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #3 declare void @llvm.stackprotector(i8*, i8**) #3
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone speculatable } attributes #2 = { nounwind readnone speculatable }
attributes #3 = { nounwind } attributes #3 = { nounwind }

2
llvm/test/CodeGen/AArch64/arm64-detect-vec-redux.ll
View File

@ -47,6 +47,6 @@ declare <2 x i64> @llvm.aarch64.neon.addp.v2i64(<2 x i64>, <2 x i64>) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare <2 x i32> @llvm.aarch64.neon.sqdmulh.v2i32(<2 x i32>, <2 x i32>) #1 declare <2 x i32> @llvm.aarch64.neon.sqdmulh.v2i32(<2 x i32>, <2 x i32>) #1
attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }
attributes #2 = { nounwind } attributes #2 = { nounwind }

2
llvm/test/CodeGen/AArch64/arm64-fma-combine-with-fpfusion.ll
View File

@ -8,5 +8,5 @@ define float @mul_add(float %a, float %b, float %c) local_unnamed_addr #0 {
ret float %add ret float %add
} }
attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/CodeGen/AArch64/arm64-misched-basic-A53.ll
View File

@ -107,7 +107,7 @@ define <4 x float> @neon4xfloat(<4 x float> %A, <4 x float> %B) {
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

2
llvm/test/CodeGen/AArch64/arm64-misched-basic-A57.ll
View File

@ -108,5 +108,5 @@ for.end: ; preds = %for.cond
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i1) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

2
llvm/test/CodeGen/AArch64/arm64-triv-disjoint-mem-access.ll
View File

@ -18,7 +18,7 @@ entry:
ret i32 %1 ret i32 %1
} }
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
!llvm.ident = !{!0} !llvm.ident = !{!0}

2
llvm/test/CodeGen/AArch64/branch-relax-block-size.mir
View File

@ -30,7 +30,7 @@
declare i32 @validate(i32*) declare i32 @validate(i32*)
attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/cxx-tlscc.ll
View File

@ -220,5 +220,5 @@ entry:
ret void ret void
} }
attributes #0 = { nounwind "no-frame-pointer-elim"="true" } attributes #0 = { nounwind "frame-pointer"="all" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

4
llvm/test/CodeGen/AArch64/dag-combine-invaraints.ll
View File

@ -32,5 +32,5 @@ main_:
declare i32 @printf(i8*, ...) #1 declare i32 @printf(i8*, ...) #1
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/CodeGen/AArch64/large-stack.ll
View File

@ -21,7 +21,7 @@ entry:
declare dso_local i32 @printf(i8*, ...) declare dso_local i32 @printf(i8*, ...)
attributes #0 = { noinline optnone "no-frame-pointer-elim"="true" } attributes #0 = { noinline optnone "frame-pointer"="all" }
; CHECK: stp x[[SPILL_REG1:[0-9]+]], x[[SPILL_REG2:[0-9]+]], [sp, #-[[SPILL_OFFSET1:[0-9]+]]] ; CHECK: stp x[[SPILL_REG1:[0-9]+]], x[[SPILL_REG2:[0-9]+]], [sp, #-[[SPILL_OFFSET1:[0-9]+]]]
; CHECK-NEXT: str x[[SPILL_REG3:[0-9]+]], [sp, #[[SPILL_OFFSET2:[0-9]+]]] ; CHECK-NEXT: str x[[SPILL_REG3:[0-9]+]], [sp, #[[SPILL_OFFSET2:[0-9]+]]]

2
llvm/test/CodeGen/AArch64/loopvectorize_pr33804_double.ll
View File

@ -110,5 +110,5 @@ for.end22.i.i: ; preds = %for.body14.i.i
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/CodeGen/AArch64/machine-outliner-all-stack.mir
View File

@ -13,7 +13,7 @@
define void @stack-save1() #0 { ret void } define void @stack-save1() #0 { ret void }
define void @stack-save2() #0 { ret void } define void @stack-save2() #0 { ret void }
define void @stack-save3() #0 { ret void } define void @stack-save3() #0 { ret void }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/machine-outliner-compatible-candidates.mir
View File

@ -12,7 +12,7 @@
define void @no-save2() #0 { ret void } define void @no-save2() #0 { ret void }
define void @reg-save() #0 { ret void } define void @reg-save() #0 { ret void }
define void @stack-save() #0 { ret void } define void @stack-save() #0 { ret void }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/machine-outliner-drop-stack.mir
View File

@ -6,7 +6,7 @@
define void @no-save2() #0 { ret void } define void @no-save2() #0 { ret void }
define void @reg-save() #0 { ret void } define void @reg-save() #0 { ret void }
define void @stack-save() #0 { ret void } define void @stack-save() #0 { ret void }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/machine-outliner-regsave.mir
View File

@ -12,7 +12,7 @@
ret void ret void
} }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---
# Make sure that when we outline and a register is available, we # Make sure that when we outline and a register is available, we

2
llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
View File

@ -13,7 +13,7 @@
ret void ret void
} }
attributes #0 = { nounwind "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { nounwind "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---
# CHECK-LABEL: name: foo # CHECK-LABEL: name: foo

2
llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
View File

@ -58,7 +58,7 @@
ret void ret void
} }
attributes #0 = { nounwind "sign-return-address"="all" "sign-return-address-key"="a_key" noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { nounwind "sign-return-address"="all" "sign-return-address-key"="a_key" noinline noredzone "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/machine-outliner-size-info.mir
View File

@ -46,7 +46,7 @@
ret void ret void
} }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---
name: foo name: foo

2
llvm/test/CodeGen/AArch64/machine-outliner-unsafe-stack-call.mir
View File

@ -10,7 +10,7 @@
define void @baz() #0 { ret void } define void @baz() #0 { ret void }
define void @f1() #0 { ret void } define void @f1() #0 { ret void }
define void @f2() #0 { ret void } define void @f2() #0 { ret void }
attributes #0 = { minsize noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { minsize noinline noredzone "frame-pointer"="all" }
... ...
--- ---

2
llvm/test/CodeGen/AArch64/machine-outliner.mir
View File

@ -15,7 +15,7 @@
ret void ret void
} }
attributes #0 = { noinline noredzone "no-frame-pointer-elim"="true" } attributes #0 = { noinline noredzone "frame-pointer"="all" }
... ...
--- ---
# This test ensures that we # This test ensures that we

2
llvm/test/CodeGen/AArch64/sched-past-vector-ldst.ll
View File

@ -53,6 +53,6 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0i8(i8*) #2
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.aarch64.neon.st2.v4f32.p0i8(<4 x float>, <4 x float>, i8* nocapture) #1 declare void @llvm.aarch64.neon.st2.v4f32.p0i8(<4 x float>, <4 x float>, i8* nocapture) #1
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="true" "no-nans-fp-math"="true" "stack-protector-buffer-size"="8" "unsafe-fp-math"="true" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { nounwind readonly } attributes #2 = { nounwind readonly }

2
llvm/test/CodeGen/AArch64/stack_guard_remat.ll
View File

@ -53,4 +53,4 @@ declare void @foo3(i32*)
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
attributes #0 = { nounwind sspstrong "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind sspstrong "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
View File

@ -24,7 +24,7 @@ define void @fn(<2 x i64>* %argA, <2 x i64>* %argB, i64* %a) #0 align 2 {
; CHECK: ret ; CHECK: ret
attributes #0 = { noinline norecurse nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "polly-optimized" "stack-protector-buffer-size"="8" "target-features"="+crc,+crypto,+neon" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { noinline norecurse nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "polly-optimized" "stack-protector-buffer-size"="8" "target-features"="+crc,+crypto,+neon" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.ident = !{!0} !llvm.ident = !{!0}

2
llvm/test/CodeGen/AArch64/win64_vararg.ll
View File

@ -147,7 +147,7 @@ define i32 @fp(i8*, i64, i8*, ...) local_unnamed_addr #6 {
ret i32 %12 ret i32 %12
} }
attributes #6 = { "no-frame-pointer-elim"="true" } attributes #6 = { "frame-pointer"="all" }
; CHECK-LABEL: vla ; CHECK-LABEL: vla
; CHECK: stp x29, x30, [sp, #-112]! ; CHECK: stp x29, x30, [sp, #-112]!

2
llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir
View File

@ -9,7 +9,7 @@
ret void ret void
} }
attributes #0 = { "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" } attributes #0 = { "frame-pointer"="all" }
... ...
--- ---
name: foo name: foo

2
llvm/test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
View File

@ -9,7 +9,7 @@
@A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1] @A = external global [4 x [4 x i32]] ; <[4 x [4 x i32]]*> [#uses=1]
; CHECK-LABEL: dct_luma_sp: ; CHECK-LABEL: dct_luma_sp:
define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) "no-frame-pointer-elim"="true" { define fastcc i32 @dct_luma_sp(i32 %block_x, i32 %block_y, i32* %coeff_cost) "frame-pointer"="all" {
entry: entry:
; Make sure to use base-updating stores for saving callee-saved registers. ; Make sure to use base-updating stores for saving callee-saved registers.
; CHECK: push ; CHECK: push

2
llvm/test/CodeGen/ARM/2010-11-29-PrologueBug.ll
View File

@ -2,7 +2,7 @@
; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s ; RUN: llc < %s -mtriple=thumbv7-apple-ios | FileCheck %s
; rdar://8690640 ; rdar://8690640
define i32* @t(i32* %x) nounwind "no-frame-pointer-elim"="true" { define i32* @t(i32* %x) nounwind "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: t: ; CHECK-LABEL: t:
; CHECK: push ; CHECK: push

2
llvm/test/CodeGen/ARM/2010-12-07-PEIBug.ll
View File

@ -1,7 +1,7 @@
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a9 | FileCheck %s ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a9 | FileCheck %s
; rdar://8728956 ; rdar://8728956
define hidden void @foo() nounwind ssp "no-frame-pointer-elim"="true" { define hidden void @foo() nounwind ssp "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: mov r7, sp ; CHECK: mov r7, sp

2
llvm/test/CodeGen/ARM/2011-08-25-ldmia_ret.ll
View File

@ -14,7 +14,7 @@ declare i1 @getbool()
declare void @foo(i32) declare void @foo(i32)
declare i32 @bar(i32) declare i32 @bar(i32)
define i32 @test(i32 %in1, i32 %in2) nounwind "no-frame-pointer-elim"="true" { define i32 @test(i32 %in1, i32 %in2) nounwind "frame-pointer"="all" {
entry: entry:
%call = tail call zeroext i1 @getbool() nounwind %call = tail call zeroext i1 @getbool() nounwind
br i1 %call, label %sw.bb18, label %sw.bb2 br i1 %call, label %sw.bb18, label %sw.bb2

2
llvm/test/CodeGen/ARM/2014-05-14-DwarfEHCrash.ll
View File

@ -45,6 +45,6 @@ declare i8* @__cxa_begin_catch(i8*)
declare void @__cxa_end_catch() declare void @__cxa_end_catch()
attributes #0 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } attributes #0 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" }
attributes #1 = { nounwind readnone } attributes #1 = { nounwind readnone }
attributes #2 = { nounwind } attributes #2 = { nounwind }

4
llvm/test/CodeGen/ARM/Windows/wineh-basic.ll
View File

@ -36,8 +36,8 @@ declare arm_aapcs_vfpcc i32 @__CxxFrameHandler3(...)
declare arm_aapcs_vfpcc void @__std_terminate() local_unnamed_addr declare arm_aapcs_vfpcc void @__std_terminate() local_unnamed_addr
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+dsp,+fp16,+neon,+strict-align,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { noreturn nounwind } attributes #2 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1} !llvm.module.flags = !{!0, !1}

24
llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll
View File

@ -60,7 +60,7 @@
; pop {r7, pc} ; pop {r7, pc}
; ;
; bx lr ; bx lr
define i32 @foo(i32 %a, i32 %b) "no-frame-pointer-elim"="true" { define i32 @foo(i32 %a, i32 %b) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: foo: ; ARM-ENABLE-LABEL: foo:
; ARM-ENABLE: @ %bb.0: ; ARM-ENABLE: @ %bb.0:
; ARM-ENABLE-NEXT: cmp r0, r1 ; ARM-ENABLE-NEXT: cmp r0, r1
@ -188,7 +188,7 @@ declare i32 @doSomething(i32, i32*)
; pop {r4, r7, pc} ; pop {r4, r7, pc}
; ;
; bx lr ; bx lr
define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) "no-frame-pointer-elim"="true" { define i32 @freqSaveAndRestoreOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop: ; ARM-ENABLE-LABEL: freqSaveAndRestoreOutsideLoop:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -347,7 +347,7 @@ declare i32 @something(...)
; @ %for.exit ; @ %for.exit
; nop ; nop
; pop {r4 ; pop {r4
define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) "no-frame-pointer-elim"="true" { define i32 @freqSaveAndRestoreOutsideLoop2(i32 %cond) "frame-pointer"="all" {
; ARM-LABEL: freqSaveAndRestoreOutsideLoop2: ; ARM-LABEL: freqSaveAndRestoreOutsideLoop2:
; ARM: @ %bb.0: @ %entry ; ARM: @ %bb.0: @ %entry
; ARM-NEXT: push {r4, r7, lr} ; ARM-NEXT: push {r4, r7, lr}
@ -553,7 +553,7 @@ for.end: ; preds = %for.body
; pop {r4, r7, pc} ; pop {r4, r7, pc}
; ;
; bx lr ; bx lr
define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) "no-frame-pointer-elim"="true" { define i32 @loopInfoSaveOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: loopInfoSaveOutsideLoop: ; ARM-ENABLE-LABEL: loopInfoSaveOutsideLoop:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -749,7 +749,7 @@ declare void @somethingElse(...)
; pop {r4, r7, pc} ; pop {r4, r7, pc}
; ;
; bx lr ; bx lr
define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) "no-frame-pointer-elim"="true" nounwind { define i32 @loopInfoRestoreOutsideLoop(i32 %cond, i32 %N) "frame-pointer"="all" nounwind {
; ARM-ENABLE-LABEL: loopInfoRestoreOutsideLoop: ; ARM-ENABLE-LABEL: loopInfoRestoreOutsideLoop:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -960,7 +960,7 @@ entry:
; pop {r4, r7, pc} ; pop {r4, r7, pc}
; ;
; bx lr ; bx lr
define i32 @inlineAsm(i32 %cond, i32 %N) "no-frame-pointer-elim"="true" { define i32 @inlineAsm(i32 %cond, i32 %N) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: inlineAsm: ; ARM-ENABLE-LABEL: inlineAsm:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -1138,7 +1138,7 @@ if.end: ; preds = %for.body, %if.else
; mov sp, r7 ; mov sp, r7
; add sp, #12 ; add sp, #12
; pop {r7, pc} ; pop {r7, pc}
define i32 @callVariadicFunc(i32 %cond, i32 %N) "no-frame-pointer-elim"="true" { define i32 @callVariadicFunc(i32 %cond, i32 %N) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: callVariadicFunc: ; ARM-ENABLE-LABEL: callVariadicFunc:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -1270,7 +1270,7 @@ declare i32 @someVariadicFunc(i32, ...)
; ;
; bl{{x?}} _abort ; bl{{x?}} _abort
; pop ; pop
define i32 @noreturn(i8 signext %bad_thing) "no-frame-pointer-elim"="true" { define i32 @noreturn(i8 signext %bad_thing) "frame-pointer"="all" {
; ARM-ENABLE-LABEL: noreturn: ; ARM-ENABLE-LABEL: noreturn:
; ARM-ENABLE: @ %bb.0: @ %entry ; ARM-ENABLE: @ %bb.0: @ %entry
; ARM-ENABLE-NEXT: cmp r0, #0 ; ARM-ENABLE-NEXT: cmp r0, #0
@ -1354,7 +1354,7 @@ attributes #0 = { noreturn nounwind }
; The only condition for this test is the compilation finishes correctly. ; The only condition for this test is the compilation finishes correctly.
; infiniteloop ; infiniteloop
; pop ; pop
define void @infiniteloop() "no-frame-pointer-elim"="true" { define void @infiniteloop() "frame-pointer"="all" {
; ARM-LABEL: infiniteloop: ; ARM-LABEL: infiniteloop:
; ARM: @ %bb.0: @ %entry ; ARM: @ %bb.0: @ %entry
; ARM-NEXT: push {r4, r5, r7, lr} ; ARM-NEXT: push {r4, r5, r7, lr}
@ -1509,7 +1509,7 @@ if.end:
; Another infinite loop test this time with a body bigger than just one block. ; Another infinite loop test this time with a body bigger than just one block.
; infiniteloop2 ; infiniteloop2
; pop ; pop
define void @infiniteloop2() "no-frame-pointer-elim"="true" { define void @infiniteloop2() "frame-pointer"="all" {
entry: entry:
br i1 undef, label %if.then, label %if.end br i1 undef, label %if.then, label %if.end
@ -1539,7 +1539,7 @@ if.end:
; Another infinite loop test this time with two nested infinite loop. ; Another infinite loop test this time with two nested infinite loop.
; infiniteloop3 ; infiniteloop3
; bx lr ; bx lr
define void @infiniteloop3() "no-frame-pointer-elim"="true" { define void @infiniteloop3() "frame-pointer"="all" {
; ARM-LABEL: infiniteloop3: ; ARM-LABEL: infiniteloop3:
; ARM: @ %bb.0: @ %entry ; ARM: @ %bb.0: @ %entry
; ARM-NEXT: mov r0, #0 ; ARM-NEXT: mov r0, #0
@ -1759,7 +1759,7 @@ declare double @llvm.pow.f64(double, double)
; info (like labels named 'line_table) not because it's found a bl instruction. ; info (like labels named 'line_table) not because it's found a bl instruction.
; ;
; bl ; bl
define float @debug_info(float %gamma, float %slopeLimit, i1 %or.cond, double %tmp) "no-frame-pointer-elim"="true" { define float @debug_info(float %gamma, float %slopeLimit, i1 %or.cond, double %tmp) "frame-pointer"="all" {
; ARM-LABEL: debug_info: ; ARM-LABEL: debug_info:
; ARM: @ %bb.0: @ %bb ; ARM: @ %bb.0: @ %bb
; ARM-NEXT: push {r4, r7, lr} ; ARM-NEXT: push {r4, r7, lr}

4
llvm/test/CodeGen/ARM/byval_load_align.ll
View File

@ -22,6 +22,6 @@ entry:
declare void @Logger(i8 signext, %struct.ModuleID* byval) #1 declare void @Logger(i8 signext, %struct.ModuleID* byval) #1
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind } attributes #2 = { nounwind }

20
llvm/test/CodeGen/ARM/call-tc.ll
View File

@ -10,14 +10,14 @@
declare void @g(i32, i32, i32, i32) declare void @g(i32, i32, i32, i32)
define void @t1() "no-frame-pointer-elim"="true" { define void @t1() "frame-pointer"="all" {
; CHECKELF-LABEL: t1: ; CHECKELF-LABEL: t1:
; CHECKELF: bl g ; CHECKELF: bl g
call void @g( i32 1, i32 2, i32 3, i32 4 ) call void @g( i32 1, i32 2, i32 3, i32 4 )
ret void ret void
} }
define void @t2() "no-frame-pointer-elim"="true" { define void @t2() "frame-pointer"="all" {
; CHECKV6-LABEL: t2: ; CHECKV6-LABEL: t2:
; CHECKV6: bx r0 ; CHECKV6: bx r0
; CHECKT2D-LABEL: t2: ; CHECKT2D-LABEL: t2:
@ -29,7 +29,7 @@ define void @t2() "no-frame-pointer-elim"="true" {
ret void ret void
} }
define void @t3() "no-frame-pointer-elim"="true" { define void @t3() "frame-pointer"="all" {
; CHECKV6-LABEL: t3: ; CHECKV6-LABEL: t3:
; CHECKV6: b _t2 ; CHECKV6: b _t2
; CHECKELF-LABEL: t3: ; CHECKELF-LABEL: t3:
@ -42,7 +42,7 @@ define void @t3() "no-frame-pointer-elim"="true" {
} }
; Sibcall optimization of expanded libcalls. rdar://8707777 ; Sibcall optimization of expanded libcalls. rdar://8707777
define double @t4(double %a) nounwind readonly ssp "no-frame-pointer-elim"="true" { define double @t4(double %a) nounwind readonly ssp "frame-pointer"="all" {
entry: entry:
; CHECKV6-LABEL: t4: ; CHECKV6-LABEL: t4:
; CHECKV6: b _sin ; CHECKV6: b _sin
@ -52,7 +52,7 @@ entry:
ret double %0 ret double %0
} }
define float @t5(float %a) nounwind readonly ssp "no-frame-pointer-elim"="true" { define float @t5(float %a) nounwind readonly ssp "frame-pointer"="all" {
entry: entry:
; CHECKV6-LABEL: t5: ; CHECKV6-LABEL: t5:
; CHECKV6: b _sinf ; CHECKV6: b _sinf
@ -66,7 +66,7 @@ declare float @sinf(float) nounwind readonly
declare double @sin(double) nounwind readonly declare double @sin(double) nounwind readonly
define i32 @t6(i32 %a, i32 %b) nounwind readnone "no-frame-pointer-elim"="true" { define i32 @t6(i32 %a, i32 %b) nounwind readnone "frame-pointer"="all" {
entry: entry:
; CHECKV6-LABEL: t6: ; CHECKV6-LABEL: t6:
; CHECKV6: b ___divsi3 ; CHECKV6: b ___divsi3
@ -80,7 +80,7 @@ entry:
; rdar://8309338 ; rdar://8309338
declare void @foo() nounwind declare void @foo() nounwind
define void @t7() nounwind "no-frame-pointer-elim"="true" { define void @t7() nounwind "frame-pointer"="all" {
entry: entry:
; CHECKT2D-LABEL: t7: ; CHECKT2D-LABEL: t7:
; CHECKT2D: it ne ; CHECKT2D: it ne
@ -101,7 +101,7 @@ bb:
; Make sure codegenprep is duplicating ret instructions to enable tail calls. ; Make sure codegenprep is duplicating ret instructions to enable tail calls.
; rdar://11140249 ; rdar://11140249
define i32 @t8(i32 %x) nounwind ssp "no-frame-pointer-elim"="true" { define i32 @t8(i32 %x) nounwind ssp "frame-pointer"="all" {
entry: entry:
; CHECKT2D-LABEL: t8: ; CHECKT2D-LABEL: t8:
; CHECKT2D-NOT: push ; CHECKT2D-NOT: push
@ -148,7 +148,7 @@ declare i32 @c(i32)
@x = external global i32, align 4 @x = external global i32, align 4
define i32 @t9() nounwind "no-frame-pointer-elim"="true" { define i32 @t9() nounwind "frame-pointer"="all" {
; CHECKT2D-LABEL: t9: ; CHECKT2D-LABEL: t9:
; CHECKT2D: bl __ZN9MutexLockC1Ev ; CHECKT2D: bl __ZN9MutexLockC1Ev
; CHECKT2D: bl __ZN9MutexLockD1Ev ; CHECKT2D: bl __ZN9MutexLockD1Ev
@ -168,7 +168,7 @@ declare %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock*) unnamed_addr nou
; rdar://13827621 ; rdar://13827621
; Correctly preserve the input chain for the tailcall node in the bitcast case, ; Correctly preserve the input chain for the tailcall node in the bitcast case,
; otherwise the call to floorf is lost. ; otherwise the call to floorf is lost.
define float @libcall_tc_test2(float* nocapture %a, float %b) "no-frame-pointer-elim"="true" { define float @libcall_tc_test2(float* nocapture %a, float %b) "frame-pointer"="all" {
; CHECKT2D-LABEL: libcall_tc_test2: ; CHECKT2D-LABEL: libcall_tc_test2:
; CHECKT2D: bl _floorf ; CHECKT2D: bl _floorf
; CHECKT2D: b.w _truncf ; CHECKT2D: b.w _truncf

2
llvm/test/CodeGen/ARM/cfguard-module-flag.ll
View File

@ -20,7 +20,7 @@ entry:
; CHECK-NOT: __guard_check_icall_fptr ; CHECK-NOT: __guard_check_icall_fptr
; CHECK-NOT: __guard_dispatch_icall_fptr ; CHECK-NOT: __guard_dispatch_icall_fptr
} }
attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+armv7-a,+dsp,+fp16,+neon,+strict-align,+thumb-mode,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false"} attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a9" "target-features"="+armv7-a,+dsp,+fp16,+neon,+strict-align,+thumb-mode,+vfp3" "unsafe-fp-math"="false" "use-soft-float"="false"}
!llvm.module.flags = !{!0} !llvm.module.flags = !{!0}
!0 = !{i32 2, !"cfguard", i32 1} !0 = !{i32 2, !"cfguard", i32 1}

4
llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll
View File

@ -72,8 +72,8 @@ declare i32 @fn3(...) #1
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.value(metadata, metadata, metadata) #2 declare void @llvm.dbg.value(metadata, metadata, metadata) #2
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
attributes #3 = { nounwind } attributes #3 = { nounwind }

2
llvm/test/CodeGen/ARM/constantpool-promote-dbg.ll
View File

@ -19,7 +19,7 @@ entry:
ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 1), !dbg !16 ret i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 1), !dbg !16
} }
attributes #0 = { minsize norecurse nounwind optsize readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m3" "target-features"="+hwdiv,+soft-float,-crypto,-neon" "unsafe-fp-math"="false" "use-soft-float"="true" } attributes #0 = { minsize norecurse nounwind optsize readnone "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m3" "target-features"="+hwdiv,+soft-float,-crypto,-neon" "unsafe-fp-math"="false" "use-soft-float"="true" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5, !6} !llvm.module.flags = !{!3, !4, !5, !6}

4
llvm/test/CodeGen/ARM/constantpool-promote.ll
View File

@ -203,8 +203,8 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1) local_unnamed_addr declare void @llvm.memmove.p0i8.p0i8.i32(i8*, i8*, i32, i1) local_unnamed_addr
declare void @llvm.memmove.p0i16.p0i16.i32(i16*, i16*, i32, i1) local_unnamed_addr declare void @llvm.memmove.p0i16.p0i16.i32(i16*, i16*, i32, i1) local_unnamed_addr
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind } attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1} !llvm.module.flags = !{!0, !1}

14
llvm/test/CodeGen/ARM/cxx-tlscc.ll
View File

@ -33,7 +33,7 @@ declare i32 @_tlv_atexit(void (i8*)*, i8*, i8*)
; THUMB: blx ; THUMB: blx
; THUMB: r4 ; THUMB: r4
; THUMB: pop {{.*}}r4 ; THUMB: pop {{.*}}r4
define cxx_fast_tlscc nonnull %struct.S* @_ZTW2sg() nounwind "no-frame-pointer-elim"="true" { define cxx_fast_tlscc nonnull %struct.S* @_ZTW2sg() nounwind "frame-pointer"="all" {
%.b.i = load i1, i1* @__tls_guard, align 1 %.b.i = load i1, i1* @__tls_guard, align 1
br i1 %.b.i, label %__tls_init.exit, label %init.i br i1 %.b.i, label %__tls_init.exit, label %init.i
@ -95,7 +95,7 @@ __tls_init.exit:
; CHECK-O0-NOT: vpop ; CHECK-O0-NOT: vpop
; CHECK-O0-NOT: vldr ; CHECK-O0-NOT: vldr
; CHECK-O0: pop ; CHECK-O0: pop
define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind "no-frame-pointer-elim"="true" { define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind "frame-pointer"="all" {
ret i32* @sum1 ret i32* @sum1
} }
@ -109,7 +109,7 @@ define cxx_fast_tlscc nonnull i32* @_ZTW4sum1() nounwind "no-frame-pointer-elim"
; CHECK-O0-NOT: vldr ; CHECK-O0-NOT: vldr
; CHECK-O0: pop ; CHECK-O0: pop
declare cxx_fast_tlscc void @tls_helper() declare cxx_fast_tlscc void @tls_helper()
define cxx_fast_tlscc %class.C* @tls_test2() #1 "no-frame-pointer-elim"="true" { define cxx_fast_tlscc %class.C* @tls_test2() #1 "frame-pointer"="all" {
call cxx_fast_tlscc void @tls_helper() call cxx_fast_tlscc void @tls_helper()
ret %class.C* @tC ret %class.C* @tC
} }
@ -119,7 +119,7 @@ define cxx_fast_tlscc %class.C* @tls_test2() #1 "no-frame-pointer-elim"="true" {
declare %class.C* @_ZN1CD1Ev(%class.C* readnone returned %this) declare %class.C* @_ZN1CD1Ev(%class.C* readnone returned %this)
; CHECK-LABEL: tls_test ; CHECK-LABEL: tls_test
; CHECK: bl __tlv_atexit ; CHECK: bl __tlv_atexit
define cxx_fast_tlscc void @__tls_test() "no-frame-pointer-elim"="true" { define cxx_fast_tlscc void @__tls_test() "frame-pointer"="all" {
entry: entry:
store i32 0, i32* getelementptr inbounds (%class.C, %class.C* @tC, i64 0, i32 0), align 4 store i32 0, i32* getelementptr inbounds (%class.C, %class.C* @tC, i64 0, i32 0), align 4
%0 = tail call i32 @_tlv_atexit(void (i8*)* bitcast (%class.C* (%class.C*)* @_ZN1CD1Ev to void (i8*)*), i8* bitcast (%class.C* @tC to i8*), i8* nonnull @__dso_handle) #1 %0 = tail call i32 @_tlv_atexit(void (i8*)* bitcast (%class.C* (%class.C*)* @_ZN1CD1Ev to void (i8*)*), i8* bitcast (%class.C* @tC to i8*), i8* nonnull @__dso_handle) #1
@ -127,7 +127,7 @@ entry:
} }
declare void @somefunc() declare void @somefunc()
define cxx_fast_tlscc void @test_ccmismatch_notail() "no-frame-pointer-elim"="true" { define cxx_fast_tlscc void @test_ccmismatch_notail() "frame-pointer"="all" {
; A tail call is not possible here because somefunc does not preserve enough ; A tail call is not possible here because somefunc does not preserve enough
; registers. ; registers.
; CHECK-LABEL: test_ccmismatch_notail: ; CHECK-LABEL: test_ccmismatch_notail:
@ -138,7 +138,7 @@ define cxx_fast_tlscc void @test_ccmismatch_notail() "no-frame-pointer-elim"="tr
} }
declare cxx_fast_tlscc void @some_fast_tls_func() declare cxx_fast_tlscc void @some_fast_tls_func()
define void @test_ccmismatch_tail() "no-frame-pointer-elim"="true" { define void @test_ccmismatch_tail() "frame-pointer"="all" {
; We can perform a tail call here because some_fast_tls_func preserves all ; We can perform a tail call here because some_fast_tls_func preserves all
; necessary registers (and more). ; necessary registers (and more).
; CHECK-LABEL: test_ccmismatch_tail: ; CHECK-LABEL: test_ccmismatch_tail:
@ -148,5 +148,5 @@ define void @test_ccmismatch_tail() "no-frame-pointer-elim"="true" {
ret void ret void
} }
attributes #0 = { nounwind "no-frame-pointer-elim"="true" } attributes #0 = { nounwind "frame-pointer"="all" }
attributes #1 = { nounwind } attributes #1 = { nounwind }

2
llvm/test/CodeGen/ARM/debug-info-arg.ll
View File

@ -6,7 +6,7 @@ target triple = "thumbv7-apple-ios"
%struct.tag_s = type { i32, i32, i32 } %struct.tag_s = type { i32, i32, i32 }
define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "no-frame-pointer-elim"="true" !dbg !1 { define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp "frame-pointer"="all" !dbg !1 {
tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20 tail call void @llvm.dbg.value(metadata %struct.tag_s* %this, metadata !5, metadata !DIExpression()), !dbg !20
tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21 tail call void @llvm.dbg.value(metadata %struct.tag_s* %c, metadata !13, metadata !DIExpression()), !dbg !21
tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22 tail call void @llvm.dbg.value(metadata i64 %x, metadata !14, metadata !DIExpression()), !dbg !22

2
llvm/test/CodeGen/ARM/disable-fp-elim.ll
View File

@ -22,4 +22,4 @@ entry:
declare i32 @foo2(i32) declare i32 @foo2(i32)
attributes #0 = { nounwind "no-frame-pointer-elim"="true" } attributes #0 = { nounwind "frame-pointer"="all" }

2
llvm/test/CodeGen/ARM/dwarf-unwind.ll
View File

@ -69,7 +69,7 @@ define void @test_nodpr_noalign(i8 %l, i8 %r) {
ret void ret void
} }
define void @test_frame_pointer_offset() minsize "no-frame-pointer-elim"="true" { define void @test_frame_pointer_offset() minsize "frame-pointer"="all" {
; CHECK-LABEL: test_frame_pointer_offset: ; CHECK-LABEL: test_frame_pointer_offset:
; CHECK: push {r4, r5, r6, r7, lr} ; CHECK: push {r4, r5, r6, r7, lr}
; CHECK: .cfi_def_cfa_offset 20 ; CHECK: .cfi_def_cfa_offset 20

2
llvm/test/CodeGen/ARM/early-cfi-sections.ll
View File

@ -13,7 +13,7 @@ entry:
ret void, !dbg !10 ret void, !dbg !10
} }
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="arm7tdmi" "target-features"="+soft-float,+strict-align,-crypto,-neon" "unsafe-fp-math"="false" "use-soft-float"="true" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="arm7tdmi" "target-features"="+soft-float,+strict-align,-crypto,-neon" "unsafe-fp-math"="false" "use-soft-float"="true" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5, !6} !llvm.module.flags = !{!3, !4, !5, !6}

6
llvm/test/CodeGen/ARM/global-merge-1.ll
View File

@ -74,9 +74,9 @@ define internal i32* @returnFoo() #2 {
ret i32* getelementptr inbounds ([5 x i32], [5 x i32]* @foo, i32 0, i32 0) ret i32* getelementptr inbounds ([5 x i32], [5 x i32]* @foo, i32 0, i32 0)
} }
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { nounwind readnone ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { nounwind } attributes #3 = { nounwind }
!llvm.ident = !{!0} !llvm.ident = !{!0}

2
llvm/test/CodeGen/ARM/hello.ll
View File

@ -9,7 +9,7 @@
@str = internal constant [12 x i8] c"Hello World\00" @str = internal constant [12 x i8] c"Hello World\00"
define i32 @main() "no-frame-pointer-elim"="true" { define i32 @main() "frame-pointer"="all" {
%tmp = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0] %tmp = call i32 @puts( i8* getelementptr ([12 x i8], [12 x i8]* @str, i32 0, i64 0) ) ; <i32> [#uses=0]
ret i32 0 ret i32 0
} }

2
llvm/test/CodeGen/ARM/ifcvt-iter-indbr.ll
View File

@ -35,7 +35,7 @@ declare i8* @bar(i32, i8*, i8*)
; CHECK-PROB: bb.2{{[0-9a-zA-Z.]*}}: ; CHECK-PROB: bb.2{{[0-9a-zA-Z.]*}}:
; CHECK-PROB: successors: %bb.3(0x40000000), %bb.5(0x40000000) ; CHECK-PROB: successors: %bb.3(0x40000000), %bb.5(0x40000000)
define i32 @test(i32 %a, i32 %a2, i32* %p, i32* %p2) "no-frame-pointer-elim"="true" { define i32 @test(i32 %a, i32 %a2, i32* %p, i32* %p2) "frame-pointer"="all" {
entry: entry:
%dst1 = call i8* @bar(i32 1, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2)) %dst1 = call i8* @bar(i32 1, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2))
%dst2 = call i8* @bar(i32 2, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2)) %dst2 = call i8* @bar(i32 2, i8* blockaddress(@test, %bb1), i8* blockaddress(@test, %bb2))

2
llvm/test/CodeGen/ARM/ifcvt10.ll
View File

@ -4,7 +4,7 @@
; micro-coded and would have long issue latency even if predicated on ; micro-coded and would have long issue latency even if predicated on
; false predicate. ; false predicate.
define void @t(double %a, double %b, double %c, double %d, i32* nocapture %solutions, double* nocapture %x) nounwind "no-frame-pointer-elim"="true" { define void @t(double %a, double %b, double %c, double %d, i32* nocapture %solutions, double* nocapture %x) nounwind "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: t: ; CHECK-LABEL: t:
; CHECK: vpop {d8} ; CHECK: vpop {d8}

4
llvm/test/CodeGen/ARM/ifcvt5.ll
View File

@ -4,14 +4,14 @@
@x = external global i32* ; <i32**> [#uses=1] @x = external global i32* ; <i32**> [#uses=1]
define void @foo(i32 %a) "no-frame-pointer-elim"="true" { define void @foo(i32 %a) "frame-pointer"="all" {
entry: entry:
%tmp = load i32*, i32** @x ; <i32*> [#uses=1] %tmp = load i32*, i32** @x ; <i32*> [#uses=1]
store i32 %a, i32* %tmp store i32 %a, i32* %tmp
ret void ret void
} }
define i32 @t1(i32 %a, i32 %b) "no-frame-pointer-elim"="true" { define i32 @t1(i32 %a, i32 %b) "frame-pointer"="all" {
; A8-LABEL: t1: ; A8-LABEL: t1:
; A8: bxlt lr ; A8: bxlt lr

2
llvm/test/CodeGen/ARM/insn-sched1.ll
View File

@ -1,7 +1,7 @@
; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o /dev/null ; RUN: llc -mtriple=arm-eabi -mattr=+v6 %s -o /dev/null
; RUN: llc -mtriple=arm-apple-ios -mattr=+v6 %s -o - | FileCheck %s ; RUN: llc -mtriple=arm-apple-ios -mattr=+v6 %s -o - | FileCheck %s
define i32 @test(i32 %x) "no-frame-pointer-elim"="true" { define i32 @test(i32 %x) "frame-pointer"="all" {
%tmp = trunc i32 %x to i16 ; <i16> [#uses=1] %tmp = trunc i32 %x to i16 ; <i16> [#uses=1]
%tmp2 = call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1] %tmp2 = call i32 @f( i32 1, i16 %tmp ) ; <i32> [#uses=1]
ret i32 %tmp2 ret i32 %tmp2

18
llvm/test/CodeGen/ARM/ldrd.ll
View File

@ -15,7 +15,7 @@
declare i64* @get_ptr() declare i64* @get_ptr()
declare void @use_i64(i64 %v) declare void @use_i64(i64 %v)
define void @test_ldrd(i64 %a) nounwind readonly "no-frame-pointer-elim"="true" { define void @test_ldrd(i64 %a) nounwind readonly "frame-pointer"="all" {
; CHECK-LABEL: test_ldrd: ; CHECK-LABEL: test_ldrd:
; NORMAL: bl{{x?}} _get_ptr ; NORMAL: bl{{x?}} _get_ptr
; A8: ldrd r0, r1, [r0] ; A8: ldrd r0, r1, [r0]
@ -49,7 +49,7 @@ define void @test_ldrd(i64 %a) nounwind readonly "no-frame-pointer-elim"="true"
; GREEDY: %bb ; GREEDY: %bb
; GREEDY: ldrd ; GREEDY: ldrd
; GREEDY: str ; GREEDY: str
define void @f(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind "no-frame-pointer-elim"="true" { define void @f(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind "frame-pointer"="all" {
entry: entry:
%0 = add nsw i32 %n, -1 ; <i32> [#uses=2] %0 = add nsw i32 %n, -1 ; <i32> [#uses=2]
%1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1] %1 = icmp sgt i32 %0, 0 ; <i1> [#uses=1]
@ -79,7 +79,7 @@ return: ; preds = %bb, %entry
@TestVar = external global %struct.Test @TestVar = external global %struct.Test
; CHECK-LABEL: Func1: ; CHECK-LABEL: Func1:
define void @Func1() nounwind ssp "no-frame-pointer-elim"="true" { define void @Func1() nounwind ssp "frame-pointer"="all" {
entry: entry:
; A8: movw [[BASE:r[0-9]+]], :lower16:{{.*}}TestVar{{.*}} ; A8: movw [[BASE:r[0-9]+]], :lower16:{{.*}}TestVar{{.*}}
; A8: movt [[BASE]], :upper16:{{.*}}TestVar{{.*}} ; A8: movt [[BASE]], :upper16:{{.*}}TestVar{{.*}}
@ -104,7 +104,7 @@ declare void @extfunc(i32, i32, i32, i32)
; A8: ldrd ; A8: ldrd
; CHECK: bl{{x?}} _extfunc ; CHECK: bl{{x?}} _extfunc
; A8: pop ; A8: pop
define void @Func2(i32* %p) "no-frame-pointer-elim"="true" { define void @Func2(i32* %p) "frame-pointer"="all" {
entry: entry:
%addr0 = getelementptr i32, i32* %p, i32 0 %addr0 = getelementptr i32, i32* %p, i32 0
%addr1 = getelementptr i32, i32* %p, i32 1 %addr1 = getelementptr i32, i32* %p, i32 1
@ -129,7 +129,7 @@ entry:
; GREEDY: ldrd r1, r2, [sp] ; GREEDY: ldrd r1, r2, [sp]
; CONSERVATIVE: ldrd r1, r2, [sp] ; CONSERVATIVE: ldrd r1, r2, [sp]
; CHECK: bl{{x?}} _extfunc ; CHECK: bl{{x?}} _extfunc
define void @strd_spill_ldrd_reload(i32 %v0, i32 %v1) "no-frame-pointer-elim"="true" { define void @strd_spill_ldrd_reload(i32 %v0, i32 %v1) "frame-pointer"="all" {
; force %v0 and %v1 to be spilled ; force %v0 and %v1 to be spilled
call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{lr}"() call void asm sideeffect "", "~{r0},~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{lr}"()
; force the reloaded %v0, %v1 into different registers ; force the reloaded %v0, %v1 into different registers
@ -143,7 +143,7 @@ declare void @extfunc2(i32*, i32, i32)
; NORMAL: ldrd r1, r2, [r0], #-8 ; NORMAL: ldrd r1, r2, [r0], #-8
; CONSERVATIVE-NOT: ldrd ; CONSERVATIVE-NOT: ldrd
; CHECK: bl{{x?}} _extfunc ; CHECK: bl{{x?}} _extfunc
define void @ldrd_postupdate_dec(i32* %p0) "no-frame-pointer-elim"="true" { define void @ldrd_postupdate_dec(i32* %p0) "frame-pointer"="all" {
%p0.1 = getelementptr i32, i32* %p0, i32 1 %p0.1 = getelementptr i32, i32* %p0, i32 1
%v0 = load i32, i32* %p0 %v0 = load i32, i32* %p0
%v1 = load i32, i32* %p0.1 %v1 = load i32, i32* %p0.1
@ -156,7 +156,7 @@ define void @ldrd_postupdate_dec(i32* %p0) "no-frame-pointer-elim"="true" {
; NORMAL: ldrd r1, r2, [r0], #8 ; NORMAL: ldrd r1, r2, [r0], #8
; CONSERVATIVE-NOT: ldrd ; CONSERVATIVE-NOT: ldrd
; CHECK: bl{{x?}} _extfunc ; CHECK: bl{{x?}} _extfunc
define void @ldrd_postupdate_inc(i32* %p0) "no-frame-pointer-elim"="true" { define void @ldrd_postupdate_inc(i32* %p0) "frame-pointer"="all" {
%p0.1 = getelementptr i32, i32* %p0, i32 1 %p0.1 = getelementptr i32, i32* %p0, i32 1
%v0 = load i32, i32* %p0 %v0 = load i32, i32* %p0
%v1 = load i32, i32* %p0.1 %v1 = load i32, i32* %p0.1
@ -169,7 +169,7 @@ define void @ldrd_postupdate_inc(i32* %p0) "no-frame-pointer-elim"="true" {
; NORMAL: strd r1, r2, [r0], #-8 ; NORMAL: strd r1, r2, [r0], #-8
; CONSERVATIVE-NOT: strd ; CONSERVATIVE-NOT: strd
; CHECK: bx lr ; CHECK: bx lr
define i32* @strd_postupdate_dec(i32* %p0, i32 %v0, i32 %v1) "no-frame-pointer-elim"="true" { define i32* @strd_postupdate_dec(i32* %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
%p0.1 = getelementptr i32, i32* %p0, i32 1 %p0.1 = getelementptr i32, i32* %p0, i32 1
store i32 %v0, i32* %p0 store i32 %v0, i32* %p0
store i32 %v1, i32* %p0.1 store i32 %v1, i32* %p0.1
@ -181,7 +181,7 @@ define i32* @strd_postupdate_dec(i32* %p0, i32 %v0, i32 %v1) "no-frame-pointer-e
; NORMAL: strd r1, r2, [r0], #8 ; NORMAL: strd r1, r2, [r0], #8
; CONSERVATIVE-NOT: strd ; CONSERVATIVE-NOT: strd
; CHECK: bx lr ; CHECK: bx lr
define i32* @strd_postupdate_inc(i32* %p0, i32 %v0, i32 %v1) "no-frame-pointer-elim"="true" { define i32* @strd_postupdate_inc(i32* %p0, i32 %v0, i32 %v1) "frame-pointer"="all" {
%p0.1 = getelementptr i32, i32* %p0, i32 1 %p0.1 = getelementptr i32, i32* %p0, i32 1
store i32 %v0, i32* %p0 store i32 %v0, i32* %p0
store i32 %v1, i32* %p0.1 store i32 %v1, i32* %p0.1

2
llvm/test/CodeGen/ARM/loopvectorize_pr33804.ll
View File

@ -110,5 +110,5 @@ for.end22.i.i: ; preds = %for.body14.i.i
declare i32 @__gxx_personality_v0(...) declare i32 @__gxx_personality_v0(...)
attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+dsp,+neon,+vfp3,-thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+dsp,+neon,+vfp3,-thumb-mode" "unsafe-fp-math"="false" "use-soft-float"="false" }

2
llvm/test/CodeGen/ARM/lsr-unfolded-offset.ll
View File

@ -15,7 +15,7 @@ target triple = "thumbv7-apple-ios"
%struct.partition_entry = type { i32, i32, i64, i64 } %struct.partition_entry = type { i32, i32, i64, i64 }
define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp "no-frame-pointer-elim"="true" { define i32 @partition_overlap_check(%struct.partition_entry* nocapture %part, i32 %num_entries) nounwind readonly optsize ssp "frame-pointer"="all" {
entry: entry:
%cmp79 = icmp sgt i32 %num_entries, 0 %cmp79 = icmp sgt i32 %num_entries, 0
br i1 %cmp79, label %outer.loop, label %for.end72 br i1 %cmp79, label %outer.loop, label %for.end72

2
llvm/test/CodeGen/ARM/memcpy-ldm-stm.ll
View File

@ -90,7 +90,7 @@ define void @test3(%struct.S* %d, %struct.S* %s) #0 {
declare void @g(i32*) declare void @g(i32*)
; Set "no-frame-pointer-elim" to increase register pressure ; Set "no-frame-pointer-elim" to increase register pressure
attributes #0 = { "no-frame-pointer-elim"="true" } attributes #0 = { "frame-pointer"="all" }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1

18
llvm/test/CodeGen/ARM/memfunc.ll
View File

@ -8,7 +8,7 @@
; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK ; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
define void @f1(i8* %dest, i8* %src) "no-frame-pointer-elim"="true" { define void @f1(i8* %dest, i8* %src) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f1 ; CHECK-LABEL: f1
@ -98,7 +98,7 @@ entry:
} }
; Check that alloca arguments to memory intrinsics are automatically aligned if at least 8 bytes in size ; Check that alloca arguments to memory intrinsics are automatically aligned if at least 8 bytes in size
define void @f2(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f2(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f2 ; CHECK-LABEL: f2
@ -144,7 +144,7 @@ entry:
} }
; Check that alloca arguments are not aligned if less than 8 bytes in size ; Check that alloca arguments are not aligned if less than 8 bytes in size
define void @f3(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f3(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f3 ; CHECK-LABEL: f3
@ -183,7 +183,7 @@ entry:
} }
; Check that alloca arguments are not aligned if size+offset is less than 8 bytes ; Check that alloca arguments are not aligned if size+offset is less than 8 bytes
define void @f4(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f4(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f4 ; CHECK-LABEL: f4
@ -222,7 +222,7 @@ entry:
} }
; Check that alloca arguments are not aligned if the offset is not a multiple of 4 ; Check that alloca arguments are not aligned if the offset is not a multiple of 4
define void @f5(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f5(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f5 ; CHECK-LABEL: f5
@ -261,7 +261,7 @@ entry:
} }
; Check that alloca arguments are not aligned if the offset is unknown ; Check that alloca arguments are not aligned if the offset is unknown
define void @f6(i8* %dest, i32 %n, i32 %i) "no-frame-pointer-elim"="true" { define void @f6(i8* %dest, i32 %n, i32 %i) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f6 ; CHECK-LABEL: f6
@ -300,7 +300,7 @@ entry:
} }
; Check that alloca arguments are not aligned if the GEP is not inbounds ; Check that alloca arguments are not aligned if the GEP is not inbounds
define void @f7(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f7(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f7 ; CHECK-LABEL: f7
@ -339,7 +339,7 @@ entry:
} }
; Check that alloca arguments are not aligned when the offset is past the end of the allocation ; Check that alloca arguments are not aligned when the offset is past the end of the allocation
define void @f8(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f8(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
; CHECK-LABEL: f8 ; CHECK-LABEL: f8
@ -389,7 +389,7 @@ entry:
@arr8 = internal global [128 x i8] undef @arr8 = internal global [128 x i8] undef
@arr9 = weak_odr global [128 x i8] undef @arr9 = weak_odr global [128 x i8] undef
@arr10 = dso_local global [8 x i8] c"\01\02\03\04\05\06\07\08", align 1 @arr10 = dso_local global [8 x i8] c"\01\02\03\04\05\06\07\08", align 1
define void @f9(i8* %dest, i32 %n) "no-frame-pointer-elim"="true" { define void @f9(i8* %dest, i32 %n) "frame-pointer"="all" {
entry: entry:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr1, i32 0, i32 0), i32 %n, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @arr1, i32 0, i32 0), i32 %n, i1 false)
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr2, i32 0, i32 0), i32 %n, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* getelementptr inbounds ([8 x i8], [8 x i8]* @arr2, i32 0, i32 0), i32 %n, i1 false)

10
llvm/test/CodeGen/ARM/noreturn.ll
View File

@ -61,7 +61,7 @@ entry:
} }
define i32 @test1_nofpelim() "no-frame-pointer-elim"="true" { define i32 @test1_nofpelim() "frame-pointer"="all" {
; CHECK-LABEL: @test1_nofpelim ; CHECK-LABEL: @test1_nofpelim
; CHECK: push ; CHECK: push
entry: entry:
@ -69,7 +69,7 @@ entry:
unreachable unreachable
} }
define i32 @test2_nofpelim(i32 %x, i32 %y) "no-frame-pointer-elim"="true" { define i32 @test2_nofpelim(i32 %x, i32 %y) "frame-pointer"="all" {
; CHECK-LABEL: @test2_nofpelim ; CHECK-LABEL: @test2_nofpelim
; CHECK: push ; CHECK: push
entry: entry:
@ -90,7 +90,7 @@ if.end: ; preds = %entry
} }
; Test case for PR17825. ; Test case for PR17825.
define i32 @test3_nofpelim() "no-frame-pointer-elim"="true" { define i32 @test3_nofpelim() "frame-pointer"="all" {
; CHECK-LABEL: @test3_nofpelim ; CHECK-LABEL: @test3_nofpelim
; CHECK: push ; CHECK: push
entry: entry:
@ -99,7 +99,7 @@ entry:
} }
; Test case for uwtable ; Test case for uwtable
define i32 @test4_nofpelim() uwtable "no-frame-pointer-elim"="true" { define i32 @test4_nofpelim() uwtable "frame-pointer"="all" {
; CHECK-LABEL: @test4_nofpelim ; CHECK-LABEL: @test4_nofpelim
; CHECK: push ; CHECK: push
entry: entry:
@ -107,7 +107,7 @@ entry:
unreachable unreachable
} }
define i32 @test5_nofpelim() uwtable "no-frame-pointer-elim"="true" { define i32 @test5_nofpelim() uwtable "frame-pointer"="all" {
; CHECK-LABEL: @test5_nofpelim ; CHECK-LABEL: @test5_nofpelim
; CHECK: push ; CHECK: push
entry: entry:

2
llvm/test/CodeGen/ARM/stack-size-section.ll
View File

@ -29,4 +29,4 @@ define void @dynalloc(i32 %N) #0 {
ret void ret void
} }
attributes #0 = { "no-frame-pointer-elim"="true" } attributes #0 = { "frame-pointer"="all" }

2
llvm/test/CodeGen/ARM/stack_guard_remat.ll
View File

@ -67,4 +67,4 @@ declare void @foo3(i32*)
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

12
llvm/test/CodeGen/ARM/swiftself.ll
View File

@ -7,7 +7,7 @@
; Parameter with swiftself should be allocated to r10. ; Parameter with swiftself should be allocated to r10.
; CHECK-LABEL: swiftself_param: ; CHECK-LABEL: swiftself_param:
; CHECK: mov r0, r10 ; CHECK: mov r0, r10
define i8 *@swiftself_param(i8* swiftself %addr0) "no-frame-pointer-elim"="true" { define i8 *@swiftself_param(i8* swiftself %addr0) "frame-pointer"="all" {
ret i8 *%addr0 ret i8 *%addr0
} }
@ -15,7 +15,7 @@ define i8 *@swiftself_param(i8* swiftself %addr0) "no-frame-pointer-elim"="true"
; CHECK-LABEL: call_swiftself: ; CHECK-LABEL: call_swiftself:
; CHECK: mov r10, r0 ; CHECK: mov r10, r0
; CHECK: bl {{_?}}swiftself_param ; CHECK: bl {{_?}}swiftself_param
define i8 *@call_swiftself(i8* %arg) "no-frame-pointer-elim"="true" { define i8 *@call_swiftself(i8* %arg) "frame-pointer"="all" {
%res = call i8 *@swiftself_param(i8* swiftself %arg) %res = call i8 *@swiftself_param(i8* swiftself %arg)
ret i8 *%res ret i8 *%res
} }
@ -25,7 +25,7 @@ define i8 *@call_swiftself(i8* %arg) "no-frame-pointer-elim"="true" {
; CHECK: push {r10} ; CHECK: push {r10}
; ... ; ...
; CHECK: pop {r10} ; CHECK: pop {r10}
define i8 *@swiftself_clobber(i8* swiftself %addr0) "no-frame-pointer-elim"="true" { define i8 *@swiftself_clobber(i8* swiftself %addr0) "frame-pointer"="all" {
call void asm sideeffect "", "~{r10}"() call void asm sideeffect "", "~{r10}"()
ret i8 *%addr0 ret i8 *%addr0
} }
@ -37,7 +37,7 @@ define i8 *@swiftself_clobber(i8* swiftself %addr0) "no-frame-pointer-elim"="tru
; OPT: bl {{_?}}swiftself_param ; OPT: bl {{_?}}swiftself_param
; OPT-NOT: mov{{.*}}r10 ; OPT-NOT: mov{{.*}}r10
; OPT-NEXT: bl {{_?}}swiftself_param ; OPT-NEXT: bl {{_?}}swiftself_param
define void @swiftself_passthrough(i8* swiftself %addr0) "no-frame-pointer-elim"="true" { define void @swiftself_passthrough(i8* swiftself %addr0) "frame-pointer"="all" {
call i8 *@swiftself_param(i8* swiftself %addr0) call i8 *@swiftself_param(i8* swiftself %addr0)
call i8 *@swiftself_param(i8* swiftself %addr0) call i8 *@swiftself_param(i8* swiftself %addr0)
ret void ret void
@ -47,7 +47,7 @@ define void @swiftself_passthrough(i8* swiftself %addr0) "no-frame-pointer-elim"
; CHECK-LABEL: swiftself_tail: ; CHECK-LABEL: swiftself_tail:
; TAILCALL: b {{_?}}swiftself_param ; TAILCALL: b {{_?}}swiftself_param
; TAILCALL-NOT: pop ; TAILCALL-NOT: pop
define i8* @swiftself_tail(i8* swiftself %addr0) "no-frame-pointer-elim"="true" { define i8* @swiftself_tail(i8* swiftself %addr0) "frame-pointer"="all" {
call void asm sideeffect "", "~{r10}"() call void asm sideeffect "", "~{r10}"()
%res = tail call i8* @swiftself_param(i8* swiftself %addr0) %res = tail call i8* @swiftself_param(i8* swiftself %addr0)
ret i8* %res ret i8* %res
@ -59,7 +59,7 @@ define i8* @swiftself_tail(i8* swiftself %addr0) "no-frame-pointer-elim"="true"
; CHECK: mov r10, r0 ; CHECK: mov r10, r0
; CHECK: bl {{_?}}swiftself_param ; CHECK: bl {{_?}}swiftself_param
; CHECK: pop ; CHECK: pop
define i8* @swiftself_notail(i8* swiftself %addr0, i8* %addr1) nounwind "no-frame-pointer-elim"="true" { define i8* @swiftself_notail(i8* swiftself %addr0, i8* %addr1) nounwind "frame-pointer"="all" {
%res = tail call i8* @swiftself_param(i8* swiftself %addr1) %res = tail call i8* @swiftself_param(i8* swiftself %addr1)
ret i8* %res ret i8* %res
} }

2
llvm/test/CodeGen/ARM/urem-opt-size.ll
View File

@ -113,5 +113,5 @@ entry:
declare i32 @GetValue(...) local_unnamed_addr declare i32 @GetValue(...) local_unnamed_addr
attributes #0 = { minsize nounwind optsize } attributes #0 = { minsize nounwind optsize }
attributes #4 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-jump-tables"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a15" "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+vfp4" "use-soft-float"="false" } attributes #4 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-jump-tables"="false" "stack-protector-buffer-size"="8" "target-cpu"="cortex-a15" "target-features"="+dsp,+hwdiv,+hwdiv-arm,+neon,+vfp4" "use-soft-float"="false" }

22
llvm/test/CodeGen/ARM/v7k-abi-align.ll
View File

@ -2,25 +2,25 @@
%struct = type { i8, i64, i8, double, i8, <2 x float>, i8, <4 x float> } %struct = type { i8, i64, i8, double, i8, <2 x float>, i8, <4 x float> }
define i32 @test_i64_align() "no-frame-pointer-elim"="true" { define i32 @test_i64_align() "frame-pointer"="all" {
; CHECK-LABEL: test_i64_align: ; CHECK-LABEL: test_i64_align:
; CHECL: movs r0, #8 ; CHECL: movs r0, #8
ret i32 ptrtoint(i64* getelementptr(%struct, %struct* null, i32 0, i32 1) to i32) ret i32 ptrtoint(i64* getelementptr(%struct, %struct* null, i32 0, i32 1) to i32)
} }
define i32 @test_f64_align() "no-frame-pointer-elim"="true" { define i32 @test_f64_align() "frame-pointer"="all" {
; CHECK-LABEL: test_f64_align: ; CHECK-LABEL: test_f64_align:
; CHECL: movs r0, #24 ; CHECL: movs r0, #24
ret i32 ptrtoint(double* getelementptr(%struct, %struct* null, i32 0, i32 3) to i32) ret i32 ptrtoint(double* getelementptr(%struct, %struct* null, i32 0, i32 3) to i32)
} }
define i32 @test_v2f32_align() "no-frame-pointer-elim"="true" { define i32 @test_v2f32_align() "frame-pointer"="all" {
; CHECK-LABEL: test_v2f32_align: ; CHECK-LABEL: test_v2f32_align:
; CHECL: movs r0, #40 ; CHECL: movs r0, #40
ret i32 ptrtoint(<2 x float>* getelementptr(%struct, %struct* null, i32 0, i32 5) to i32) ret i32 ptrtoint(<2 x float>* getelementptr(%struct, %struct* null, i32 0, i32 5) to i32)
} }
define i32 @test_v4f32_align() "no-frame-pointer-elim"="true" { define i32 @test_v4f32_align() "frame-pointer"="all" {
; CHECK-LABEL: test_v4f32_align: ; CHECK-LABEL: test_v4f32_align:
; CHECL: movs r0, #64 ; CHECL: movs r0, #64
ret i32 ptrtoint(<4 x float>* getelementptr(%struct, %struct* null, i32 0, i32 7) to i32) ret i32 ptrtoint(<4 x float>* getelementptr(%struct, %struct* null, i32 0, i32 7) to i32)
@ -28,7 +28,7 @@ define i32 @test_v4f32_align() "no-frame-pointer-elim"="true" {
; Key point here is than an extra register has to be saved so that the DPRs end ; Key point here is than an extra register has to be saved so that the DPRs end
; up in an aligned location (as prologue/epilogue inserter had calculated). ; up in an aligned location (as prologue/epilogue inserter had calculated).
define void @test_dpr_unwind_align() "no-frame-pointer-elim"="true" { define void @test_dpr_unwind_align() "frame-pointer"="all" {
; CHECK-LABEL: test_dpr_unwind_align: ; CHECK-LABEL: test_dpr_unwind_align:
; CHECK: push {r5, r6, r7, lr} ; CHECK: push {r5, r6, r7, lr}
; CHECK-NOT: sub sp ; CHECK-NOT: sub sp
@ -51,7 +51,7 @@ define void @test_dpr_unwind_align() "no-frame-pointer-elim"="true" {
; This time, there's no viable way to tack CS-registers onto the list: a real SP ; This time, there's no viable way to tack CS-registers onto the list: a real SP
; adjustment needs to be performed to put d8 and d9 where they should be. ; adjustment needs to be performed to put d8 and d9 where they should be.
define void @test_dpr_unwind_align_manually() "no-frame-pointer-elim"="true" { define void @test_dpr_unwind_align_manually() "frame-pointer"="all" {
; CHECK-LABEL: test_dpr_unwind_align_manually: ; CHECK-LABEL: test_dpr_unwind_align_manually:
; CHECK: push {r4, r5, r6, r7, lr} ; CHECK: push {r4, r5, r6, r7, lr}
; CHECK-NOT: sub sp ; CHECK-NOT: sub sp
@ -76,7 +76,7 @@ define void @test_dpr_unwind_align_manually() "no-frame-pointer-elim"="true" {
} }
; If there's only a CS1 area, the sub should be in the right place: ; If there's only a CS1 area, the sub should be in the right place:
define void @test_dpr_unwind_align_just_cs1() "no-frame-pointer-elim"="true" { define void @test_dpr_unwind_align_just_cs1() "frame-pointer"="all" {
; CHECK-LABEL: test_dpr_unwind_align_just_cs1: ; CHECK-LABEL: test_dpr_unwind_align_just_cs1:
; CHECK: push {r4, r5, r6, r7, lr} ; CHECK: push {r4, r5, r6, r7, lr}
; CHECK: sub sp, #4 ; CHECK: sub sp, #4
@ -99,7 +99,7 @@ define void @test_dpr_unwind_align_just_cs1() "no-frame-pointer-elim"="true" {
} }
; If there are no DPRs, we shouldn't try to align the stack in stages anyway ; If there are no DPRs, we shouldn't try to align the stack in stages anyway
define void @test_dpr_unwind_align_no_dprs() "no-frame-pointer-elim"="true" { define void @test_dpr_unwind_align_no_dprs() "frame-pointer"="all" {
; CHECK-LABEL: test_dpr_unwind_align_no_dprs: ; CHECK-LABEL: test_dpr_unwind_align_no_dprs:
; CHECK: push {r4, r5, r6, r7, lr} ; CHECK: push {r4, r5, r6, r7, lr}
; CHECK: sub sp, #12 ; CHECK: sub sp, #12
@ -117,7 +117,7 @@ define void @test_dpr_unwind_align_no_dprs() "no-frame-pointer-elim"="true" {
; 128-bit vectors should use 128-bit (i.e. correctly aligned) slots on ; 128-bit vectors should use 128-bit (i.e. correctly aligned) slots on
; the stack. ; the stack.
define <4 x float> @test_v128_stack_pass([8 x double], float, <4 x float> %in) "no-frame-pointer-elim"="true" { define <4 x float> @test_v128_stack_pass([8 x double], float, <4 x float> %in) "frame-pointer"="all" {
; CHECK-LABEL: test_v128_stack_pass: ; CHECK-LABEL: test_v128_stack_pass:
; CHECK: add r[[ADDR:[0-9]+]], sp, #16 ; CHECK: add r[[ADDR:[0-9]+]], sp, #16
; CHECK: vld1.64 {d0, d1}, [r[[ADDR]]:128] ; CHECK: vld1.64 {d0, d1}, [r[[ADDR]]:128]
@ -129,7 +129,7 @@ declare void @varargs(i32, ...)
; When varargs are enabled, we go down a different route. Still want 128-bit ; When varargs are enabled, we go down a different route. Still want 128-bit
; alignment though. ; alignment though.
define void @test_v128_stack_pass_varargs(<4 x float> %in) "no-frame-pointer-elim"="true" { define void @test_v128_stack_pass_varargs(<4 x float> %in) "frame-pointer"="all" {
; CHECK-LABEL: test_v128_stack_pass_varargs: ; CHECK-LABEL: test_v128_stack_pass_varargs:
; CHECK: add r[[ADDR:[0-9]+]], sp, #16 ; CHECK: add r[[ADDR:[0-9]+]], sp, #16
; CHECK: vst1.64 {d0, d1}, [r[[ADDR]]:128] ; CHECK: vst1.64 {d0, d1}, [r[[ADDR]]:128]
@ -140,7 +140,7 @@ define void @test_v128_stack_pass_varargs(<4 x float> %in) "no-frame-pointer-eli
; To be compatible with AAPCS's va_start model (store r0-r3 at incoming SP, give ; To be compatible with AAPCS's va_start model (store r0-r3 at incoming SP, give
; a single pointer), 64-bit quantities must be pass ; a single pointer), 64-bit quantities must be pass
define i64 @test_64bit_gpr_align(i32, i64 %r2_r3, i32 %sp) "no-frame-pointer-elim"="true" { define i64 @test_64bit_gpr_align(i32, i64 %r2_r3, i32 %sp) "frame-pointer"="all" {
; CHECK-LABEL: test_64bit_gpr_align: ; CHECK-LABEL: test_64bit_gpr_align:
; CHECK: ldr [[RHS:r[0-9]+]], [sp] ; CHECK: ldr [[RHS:r[0-9]+]], [sp]
; CHECK: adds r0, [[RHS]], r2 ; CHECK: adds r0, [[RHS]], r2

4
llvm/test/CodeGen/ARM/warn-stack.ll
View File

@ -4,7 +4,7 @@
; <rdar://13987214> ; <rdar://13987214>
; CHECK-NOT: nowarn ; CHECK-NOT: nowarn
define void @nowarn() nounwind ssp "no-frame-pointer-elim"="true" { define void @nowarn() nounwind ssp "frame-pointer"="all" {
entry: entry:
%buffer = alloca [12 x i8], align 1 %buffer = alloca [12 x i8], align 1
%arraydecay = getelementptr inbounds [12 x i8], [12 x i8]* %buffer, i64 0, i64 0 %arraydecay = getelementptr inbounds [12 x i8], [12 x i8]* %buffer, i64 0, i64 0
@ -13,7 +13,7 @@ entry:
} }
; CHECK: warning: stack size limit exceeded (92) in warn ; CHECK: warning: stack size limit exceeded (92) in warn
define void @warn() nounwind ssp "no-frame-pointer-elim"="true" { define void @warn() nounwind ssp "frame-pointer"="all" {
entry: entry:
%buffer = alloca [80 x i8], align 1 %buffer = alloca [80 x i8], align 1
%arraydecay = getelementptr inbounds [80 x i8], [80 x i8]* %buffer, i64 0, i64 0 %arraydecay = getelementptr inbounds [80 x i8], [80 x i8]* %buffer, i64 0, i64 0

2
llvm/test/CodeGen/BPF/BTF/binary-format.ll
View File

@ -44,7 +44,7 @@ entry:
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

2
llvm/test/CodeGen/BPF/BTF/char-no-debuginfo.ll
View File

@ -18,7 +18,7 @@ define dso_local i32 @test() local_unnamed_addr #0 {
; CHECK-NOT: .section .BTF ; CHECK-NOT: .section .BTF
; CHECK-NOT: .section .BTF.ext ; CHECK-NOT: .section .BTF.ext
attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.module.flags = !{!0} !llvm.module.flags = !{!0}
!llvm.ident = !{!1} !llvm.ident = !{!1}

2
llvm/test/CodeGen/BPF/BTF/extern-global-var.ll
View File

@ -45,7 +45,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !7 {
; CHECK-NEXT: .ascii "/home/yhs/work/tests/llvm/bug/test.c" # string offset=15 ; CHECK-NEXT: .ascii "/home/yhs/work/tests/llvm/bug/test.c" # string offset=15
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5} !llvm.module.flags = !{!3, !4, !5}

2
llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll
View File

@ -97,7 +97,7 @@ entry:
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}

2
llvm/test/CodeGen/BPF/BTF/func-non-void.ll
View File

@ -75,7 +75,7 @@ define dso_local i32 @f1(i32 returned) local_unnamed_addr #0 !dbg !7 {
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

2
llvm/test/CodeGen/BPF/BTF/func-source.ll
View File

@ -63,7 +63,7 @@ entry:
; CHECK-NEXT: .long 18 ; CHECK-NEXT: .long 18
; CHECK-NEXT: .long 1040 # Line 1 Col 16 ; CHECK-NEXT: .long 1040 # Line 1 Col 16
attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5} !llvm.module.flags = !{!3, !4, !5}

2
llvm/test/CodeGen/BPF/BTF/func-typedef.ll
View File

@ -89,7 +89,7 @@ entry:
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

2
llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll
View File

@ -71,7 +71,7 @@ define dso_local i32 @f1(i32) local_unnamed_addr #0 !dbg !7 {
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}

2
llvm/test/CodeGen/BPF/BTF/func-void.ll
View File

@ -57,7 +57,7 @@ define dso_local void @f1() local_unnamed_addr #0 !dbg !7 {
; CHECK-NEXT: .long 0 ; CHECK-NEXT: .long 0
; CHECK-NEXT: .long 1040 # Line 1 Col 16 ; CHECK-NEXT: .long 1040 # Line 1 Col 16
attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4, !5} !llvm.module.flags = !{!3, !4, !5}

2
llvm/test/CodeGen/BPF/BTF/local-var.ll
View File

@ -71,7 +71,7 @@ declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #2
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #1 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind readnone speculatable } attributes #1 = { nounwind readnone speculatable }
attributes #2 = { argmemonly nounwind } attributes #2 = { argmemonly nounwind }

2
llvm/test/CodeGen/BPF/BTF/static-var-derived-type.ll
View File

@ -141,7 +141,7 @@ define dso_local i64 @foo() local_unnamed_addr #0 !dbg !27 {
; CHECK-NEXT: .ascii ".rodata" # string offset=87 ; CHECK-NEXT: .ascii ".rodata" # string offset=87
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!23, !24, !25} !llvm.module.flags = !{!23, !24, !25}

2
llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll
View File

@ -93,7 +93,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii "maps" # string offset=71 ; CHECK-NEXT: .ascii "maps" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!16, !17, !18} !llvm.module.flags = !{!16, !17, !18}

2
llvm/test/CodeGen/BPF/BTF/static-var-inited.ll
View File

@ -93,7 +93,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii ".data" # string offset=71 ; CHECK-NEXT: .ascii ".data" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!16, !17, !18} !llvm.module.flags = !{!16, !17, !18}

2
llvm/test/CodeGen/BPF/BTF/static-var-readonly-sec.ll
View File

@ -99,7 +99,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii "maps" # string offset=71 ; CHECK-NEXT: .ascii "maps" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!18, !19, !20} !llvm.module.flags = !{!18, !19, !20}

2
llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll
View File

@ -99,7 +99,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii ".rodata" # string offset=71 ; CHECK-NEXT: .ascii ".rodata" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!18, !19, !20} !llvm.module.flags = !{!18, !19, !20}

2
llvm/test/CodeGen/BPF/BTF/static-var-sec.ll
View File

@ -93,7 +93,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii "maps" # string offset=71 ; CHECK-NEXT: .ascii "maps" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!16, !17, !18} !llvm.module.flags = !{!16, !17, !18}

2
llvm/test/CodeGen/BPF/BTF/static-var-zerolen-array.ll
View File

@ -104,7 +104,7 @@ define dso_local i32 @test() local_unnamed_addr #0 !dbg !21 {
; CHECK-NEXT: .ascii ".data" # string offset=89 ; CHECK-NEXT: .ascii ".data" # string offset=89
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!2} !llvm.dbg.cu = !{!2}
!llvm.module.flags = !{!17, !18, !19} !llvm.module.flags = !{!17, !18, !19}

2
llvm/test/CodeGen/BPF/BTF/static-var.ll
View File

@ -93,7 +93,7 @@ define dso_local i32 @foo() local_unnamed_addr #0 !dbg !2 {
; CHECK-NEXT: .ascii ".bss" # string offset=71 ; CHECK-NEXT: .ascii ".bss" # string offset=71
; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .byte 0
attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
!llvm.dbg.cu = !{!7} !llvm.dbg.cu = !{!7}
!llvm.module.flags = !{!16, !17, !18} !llvm.module.flags = !{!16, !17, !18}

4
llvm/test/CodeGen/BPF/CORE/intrinsic-array.ll
View File

@ -48,8 +48,8 @@ declare i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.ss(%struct.s*,
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #3 declare void @llvm.dbg.value(metadata, metadata, metadata) #3
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
attributes #3 = { nounwind readnone speculatable } attributes #3 = { nounwind readnone speculatable }
attributes #4 = { nounwind } attributes #4 = { nounwind }

4
llvm/test/CodeGen/BPF/CORE/intrinsic-struct.ll
View File

@ -45,8 +45,8 @@ declare i32* @llvm.preserve.struct.access.index.p0i32.p0s_struct.ss(%struct.s*,
; Function Attrs: nounwind readnone speculatable ; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #3 declare void @llvm.dbg.value(metadata, metadata, metadata) #3
attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "frame-pointer"="all" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
attributes #3 = { nounwind readnone speculatable } attributes #3 = { nounwind readnone speculatable }
attributes #4 = { nounwind } attributes #4 = { nounwind }

Some files were not shown because too many files have changed in this diff Show More