diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td index 9c61161c2dc3..2c49b4fbdcf1 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td @@ -367,7 +367,7 @@ multiclass VPatNConvertFP2ISDNode_V { // Patterns. //===----------------------------------------------------------------------===// -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { // 7.4. Vector Unit-Stride Instructions foreach vti = !listconcat(FractionalGroupIntegerVectors, @@ -573,9 +573,9 @@ foreach mti = AllMasks in { VR:$rs, VR:$rs, mti.AVL, mti.Log2SEW)>; } -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] -let Predicates = [HasStdExtV, HasStdExtF] in { +let Predicates = [HasVInstructionsAnyF] in { // 14.2. Vector Single-Width Floating-Point Add/Subtract Instructions defm : VPatBinaryFPSDNode_VV_VF; @@ -757,13 +757,13 @@ foreach fvtiToFWti = AllWidenableFloatVectors in { (!cast("PseudoVFNCVT_F_F_W_"#fvti.LMul.MX) fwti.RegClass:$rs1, fvti.AVL, fvti.Log2SEW)>; } -} // Predicates = [HasStdExtV, HasStdExtF] +} // Predicates = [HasVInstructionsAnyF] //===----------------------------------------------------------------------===// // Vector Splats //===----------------------------------------------------------------------===// -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { foreach vti = AllIntegerVectors in { def : Pat<(vti.Vector (SplatPat GPR:$rs1)), (!cast("PseudoVMV_V_X_" # vti.LMul.MX) @@ -772,9 +772,9 @@ foreach vti = AllIntegerVectors in { (!cast("PseudoVMV_V_I_" # vti.LMul.MX) simm5:$rs1, vti.AVL, vti.Log2SEW)>; } -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] -let Predicates = [HasStdExtV, HasStdExtF] in { +let Predicates = [HasVInstructionsAnyF] in { foreach fvti = AllFloatVectors in { def : Pat<(fvti.Vector (splat_vector fvti.ScalarRegClass:$rs1)), (!cast("PseudoVFMV_V_"#fvti.ScalarSuffix#"_"#fvti.LMul.MX) @@ -785,12 +785,12 @@ foreach fvti = AllFloatVectors in { (!cast("PseudoVMV_V_I_"#fvti.LMul.MX) 0, fvti.AVL, fvti.Log2SEW)>; } -} // Predicates = [HasStdExtV, HasStdExtF] +} // Predicates = [HasVInstructionsAnyF] //===----------------------------------------------------------------------===// // Vector Element Extracts //===----------------------------------------------------------------------===// -let Predicates = [HasStdExtV, HasStdExtF] in +let Predicates = [HasVInstructionsAnyF] in foreach vti = AllFloatVectors in { defvar vmv_f_s_inst = !cast(!strconcat("PseudoVFMV_", vti.ScalarSuffix, diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td index 9656ccd36ed1..22ea9b3fb840 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td @@ -606,7 +606,7 @@ multiclass VPatReductionVL { // Patterns. //===----------------------------------------------------------------------===// -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { // 7.4. Vector Unit-Stride Instructions foreach vti = AllVectors in { @@ -925,10 +925,10 @@ defm : VPatBinaryVL_VV_VX_VI; defm : VPatBinaryVL_VV_VX; defm : VPatBinaryVL_VV_VX; -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] // 15.1. Vector Single-Width Integer Reduction Instructions -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { defm : VPatReductionVL; defm : VPatReductionVL; defm : VPatReductionVL; @@ -937,17 +937,17 @@ defm : VPatReductionVL; defm : VPatReductionVL; defm : VPatReductionVL; defm : VPatReductionVL; -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] // 15.3. Vector Single-Width Floating-Point Reduction Instructions -let Predicates = [HasStdExtV, HasStdExtF] in { +let Predicates = [HasVInstructionsAnyF] in { defm : VPatReductionVL; defm : VPatReductionVL; defm : VPatReductionVL; defm : VPatReductionVL; -} // Predicates = [HasStdExtV, HasStdExtF] +} // Predicates = [HasVInstructionsAnyF] -let Predicates = [HasStdExtV, HasStdExtF] in { +let Predicates = [HasVInstructionsAnyF] in { // 14.2. Vector Single-Width Floating-Point Add/Subtract Instructions defm : VPatBinaryFPVL_VV_VF; @@ -1209,9 +1209,9 @@ foreach fvti = AllFloatVectors in { } } -} // Predicates = [HasStdExtV, HasStdExtF] +} // Predicates = [HasVInstructionsAnyF] -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { foreach mti = AllMasks in { // 16.1 Vector Mask-Register Logical Instructions @@ -1279,9 +1279,9 @@ foreach mti = AllMasks in { VR:$rs2, (mti.Mask V0), GPR:$vl, mti.Log2SEW)>; } -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { // 17.1. Integer Scalar Move Instructions // 17.4. Vector Register Gather Instruction foreach vti = AllIntegerVectors in { @@ -1361,9 +1361,9 @@ foreach vti = AllIntegerVectors in { } } -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] -let Predicates = [HasStdExtV, HasStdExtF] in { +let Predicates = [HasVInstructionsAnyF] in { // 17.2. Floating-Point Scalar Move Instructions foreach vti = AllFloatVectors in { @@ -1443,7 +1443,7 @@ foreach vti = AllFloatVectors in { } } -} // Predicates = [HasStdExtV, HasStdExtF] +} // Predicates = [HasVInstructionsAnyF] //===----------------------------------------------------------------------===// // Miscellaneous RISCVISD SDNodes @@ -1467,7 +1467,7 @@ def riscv_slide1up_vl : SDNode<"RISCVISD::VSLIDE1UP_VL", SDTRVVSlide1, []>; def riscv_slidedown_vl : SDNode<"RISCVISD::VSLIDEDOWN_VL", SDTRVVSlide, []>; def riscv_slide1down_vl : SDNode<"RISCVISD::VSLIDE1DOWN_VL", SDTRVVSlide1, []>; -let Predicates = [HasStdExtV] in { +let Predicates = [HasVInstructions] in { foreach vti = AllIntegerVectors in { def : Pat<(vti.Vector (riscv_vid_vl (vti.Mask true_mask), @@ -1520,4 +1520,4 @@ foreach vti = !listconcat(AllIntegerVectors, AllFloatVectors) in { GPR:$vl, vti.Log2SEW)>; } -} // Predicates = [HasStdExtV] +} // Predicates = [HasVInstructions] diff --git a/llvm/lib/Target/RISCV/RISCVSubtarget.h b/llvm/lib/Target/RISCV/RISCVSubtarget.h index 0a9a8eff027a..219955e4a1d0 100644 --- a/llvm/lib/Target/RISCV/RISCVSubtarget.h +++ b/llvm/lib/Target/RISCV/RISCVSubtarget.h @@ -138,8 +138,8 @@ public: bool hasVInstructionsF16() const { return HasStdExtV && hasStdExtZfh(); } bool hasVInstructionsF32() const { return HasStdExtV && hasStdExtF(); } bool hasVInstructionsF64() const { return HasStdExtV && hasStdExtD(); } - // D and Zfh imply F. - bool hasVInstructionsAnyF() const { return HasStdExtV && hasStdExtF(); } + // F16 and F64 both require F32. + bool hasVInstructionsAnyF() const { return hasVInstructionsF32(); } unsigned getMaxInterleaveFactor() const { return hasVInstructions() ? MaxInterleaveFactor : 1; }