From 4ff3cf6d927049db47edbd5bc981ab19f5e17f5e Mon Sep 17 00:00:00 2001 From: Sanjoy Das Date: Wed, 28 Oct 2015 03:20:10 +0000 Subject: [PATCH] [SelectionDAG] Don't inspect !range metadata for extended loads Summary: Don't call `computeKnownBitsFromRangeMetadata` for extended loads -- this can cause a mismatch between the width of the !range metadata and the width of the APInt's accumulating `KnownZero` (and `KnownOne` in the future). This isn't a problem now, but will be after a future change. Note: this can be made more aggressive in the future. Reviewers: nlewycky Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14107 llvm-svn: 251486 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 ++- .../PowerPC/selectiondag-extload-computeknownbits.ll | 12 ++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) create mode 100644 llvm/test/CodeGen/PowerPC/selectiondag-extload-computeknownbits.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 0323ed3f1309..66f5ba7f5dd3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2284,7 +2284,8 @@ void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero, unsigned MemBits = VT.getScalarType().getSizeInBits(); KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits); } else if (const MDNode *Ranges = LD->getRanges()) { - computeKnownBitsFromRangeMetadata(*Ranges, KnownZero); + if (LD->getExtensionType() == ISD::NON_EXTLOAD) + computeKnownBitsFromRangeMetadata(*Ranges, KnownZero); } break; } diff --git a/llvm/test/CodeGen/PowerPC/selectiondag-extload-computeknownbits.ll b/llvm/test/CodeGen/PowerPC/selectiondag-extload-computeknownbits.ll new file mode 100644 index 000000000000..79dccaa98ca1 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/selectiondag-extload-computeknownbits.ll @@ -0,0 +1,12 @@ +; RUN: llc -mtriple=powerpc64-bgq-linux < %s + +; Check that llc does not crash due to an illegal APInt operation + +define i1 @f(i8* %ptr) { + entry: + %val = load i8, i8* %ptr, align 8, !range !0 + %tobool = icmp eq i8 %val, 0 + ret i1 %tobool +} + +!0 = !{i8 0, i8 2}