forked from OSchip/llvm-project
[Triple] Use clang-format to normalize the formatting of the ARM target
parsing logic prior to making substantial changes to it. This parsing logic is incredibly wasteful, so I'm planning to rewrite it. Just unittesting the triple parsing logic spends well over 80% of its time in the ARM parsing logic, and others have measured significant time spent here in real production compiles. Stay tuned... llvm-svn: 246369
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@ -20,7 +20,7 @@
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#include <vector>
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namespace llvm {
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class StringRef;
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class StringRef;
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// Target specific information into their own namespaces. These should be
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// generated from TableGen because the information is already there, and there
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@ -29,8 +29,9 @@ namespace llvm {
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// even if the back-end is not compiled with LLVM, plus we need to create a new
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// back-end to TableGen to create these clean tables.
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namespace ARM {
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// FPU names.
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enum FPUKind {
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// FPU names.
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enum FPUKind {
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FK_INVALID = 0,
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FK_NONE,
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FK_VFP,
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@ -54,34 +55,34 @@ namespace ARM {
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FK_CRYPTO_NEON_FP_ARMV8,
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FK_SOFTVFP,
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FK_LAST
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};
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};
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// FPU Version
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enum FPUVersion {
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// FPU Version
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enum FPUVersion {
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FV_NONE = 0,
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FV_VFPV2,
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FV_VFPV3,
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FV_VFPV3_FP16,
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FV_VFPV4,
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FV_VFPV5
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};
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};
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// An FPU name implies one of three levels of Neon support:
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enum NeonSupportLevel {
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// An FPU name implies one of three levels of Neon support:
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enum NeonSupportLevel {
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NS_None = 0, ///< No Neon
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NS_Neon, ///< Neon
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NS_Crypto ///< Neon with Crypto
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};
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};
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// An FPU name restricts the FPU in one of three ways:
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enum FPURestriction {
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// An FPU name restricts the FPU in one of three ways:
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enum FPURestriction {
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FR_None = 0, ///< No restriction
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FR_D16, ///< Only 16 D registers
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FR_SP_D16 ///< Only single-precision instructions, with 16 D registers
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};
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};
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// Arch names.
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enum ArchKind {
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// Arch names.
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enum ArchKind {
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AK_INVALID = 0,
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AK_ARMV2,
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AK_ARMV2A,
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@ -119,10 +120,10 @@ namespace ARM {
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AK_ARMV7S,
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AK_ARMV7K,
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AK_LAST
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};
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};
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// Arch extension modifiers for CPUs.
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enum ArchExtKind : unsigned {
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// Arch extension modifiers for CPUs.
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enum ArchExtKind : unsigned {
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AEK_INVALID = 0x0,
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AEK_NONE = 0x1,
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AEK_CRC = 0x2,
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@ -140,62 +141,47 @@ namespace ARM {
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AEK_IWMMXT2 = 0x20000000,
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AEK_MAVERICK = 0x40000000,
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AEK_XSCALE = 0x80000000,
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};
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};
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// ISA kinds.
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enum ISAKind {
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IK_INVALID = 0,
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IK_ARM,
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IK_THUMB,
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IK_AARCH64
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};
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// ISA kinds.
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enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 };
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// Endianness
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// FIXME: BE8 vs. BE32?
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enum EndianKind {
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EK_INVALID = 0,
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EK_LITTLE,
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EK_BIG
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};
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// Endianness
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// FIXME: BE8 vs. BE32?
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enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG };
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// v6/v7/v8 Profile
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enum ProfileKind {
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PK_INVALID = 0,
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PK_A,
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PK_R,
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PK_M
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};
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// v6/v7/v8 Profile
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enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M };
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StringRef getCanonicalArchName(StringRef Arch);
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StringRef getCanonicalArchName(StringRef Arch);
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// Information by ID
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const char * getFPUName(unsigned FPUKind);
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unsigned getFPUVersion(unsigned FPUKind);
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unsigned getFPUNeonSupportLevel(unsigned FPUKind);
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unsigned getFPURestriction(unsigned FPUKind);
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unsigned getDefaultFPU(StringRef CPU);
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// FIXME: This should be moved to TargetTuple once it exists
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bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
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bool getHWDivFeatures(unsigned HWDivKind,
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std::vector<const char *> &Features);
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const char *getArchName(unsigned ArchKind);
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unsigned getArchAttr(unsigned ArchKind);
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const char *getCPUAttr(unsigned ArchKind);
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const char *getSubArch(unsigned ArchKind);
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const char *getArchExtName(unsigned ArchExtKind);
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const char *getHWDivName(unsigned HWDivKind);
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const char *getDefaultCPU(StringRef Arch);
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// Information by ID
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const char *getFPUName(unsigned FPUKind);
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unsigned getFPUVersion(unsigned FPUKind);
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unsigned getFPUNeonSupportLevel(unsigned FPUKind);
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unsigned getFPURestriction(unsigned FPUKind);
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unsigned getDefaultFPU(StringRef CPU);
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// FIXME: This should be moved to TargetTuple once it exists
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bool getFPUFeatures(unsigned FPUKind, std::vector<const char *> &Features);
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bool getHWDivFeatures(unsigned HWDivKind, std::vector<const char *> &Features);
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const char *getArchName(unsigned ArchKind);
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unsigned getArchAttr(unsigned ArchKind);
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const char *getCPUAttr(unsigned ArchKind);
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const char *getSubArch(unsigned ArchKind);
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const char *getArchExtName(unsigned ArchExtKind);
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const char *getHWDivName(unsigned HWDivKind);
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const char *getDefaultCPU(StringRef Arch);
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// Parser
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unsigned parseHWDiv(StringRef HWDiv);
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unsigned parseFPU(StringRef FPU);
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unsigned parseArch(StringRef Arch);
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unsigned parseArchExt(StringRef ArchExt);
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unsigned parseCPUArch(StringRef CPU);
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unsigned parseArchISA(StringRef Arch);
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unsigned parseArchEndian(StringRef Arch);
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unsigned parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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// Parser
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unsigned parseHWDiv(StringRef HWDiv);
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unsigned parseFPU(StringRef FPU);
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unsigned parseArch(StringRef Arch);
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unsigned parseArchExt(StringRef ArchExt);
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unsigned parseCPUArch(StringRef CPU);
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unsigned parseArchISA(StringRef Arch);
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unsigned parseArchEndian(StringRef Arch);
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unsigned parseArchProfile(StringRef Arch);
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unsigned parseArchVersion(StringRef Arch);
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} // namespace ARM
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} // namespace llvm
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@ -495,7 +495,7 @@ StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
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// AArch64 uses "_be", not "eb" suffix.
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if (A.find("eb") != StringRef::npos)
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return Error;
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if (A.substr(offset,3) == "_be")
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if (A.substr(offset, 3) == "_be")
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offset += 3;
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}
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@ -584,8 +584,7 @@ unsigned llvm::ARM::parseArchISA(StringRef Arch) {
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// Little/Big endian
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unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
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if (Arch.startswith("armeb") ||
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Arch.startswith("thumbeb") ||
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if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
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Arch.startswith("aarch64_be"))
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return ARM::EK_BIG;
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// Profile A/R/M
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unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
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Arch = getCanonicalArchName(Arch);
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switch(parseArch(Arch)) {
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switch (parseArch(Arch)) {
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case ARM::AK_ARMV6M:
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case ARM::AK_ARMV7M:
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case ARM::AK_ARMV6SM:
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// Version number (ex. v7 = 7).
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unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
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Arch = getCanonicalArchName(Arch);
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switch(parseArch(Arch)) {
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switch (parseArch(Arch)) {
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case ARM::AK_ARMV2:
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case ARM::AK_ARMV2A:
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return 2;
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