forked from OSchip/llvm-project
Rename Interval class to LiveInterval to avoid conflicting with the already
existing llvm::Interval class. Patch contributed by Vladimir Prus! http://mail.cs.uiuc.edu/pipermail/llvmbugs/2004-June/000710.html llvm-svn: 14281
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265eb6469a
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@ -136,7 +136,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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if (tii.isMoveInstr(*mii, srcReg, dstReg) &&
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rep(srcReg) == rep(dstReg)) {
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// remove from def list
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Interval& interval = getOrCreateInterval(rep(dstReg));
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LiveInterval& interval = getOrCreateInterval(rep(dstReg));
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// remove index -> MachineInstr and
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// MachineInstr -> index mappings
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Mi2IndexMap::iterator mi2i = mi2iMap_.find(mii);
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@ -170,7 +170,7 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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intervals_.sort();
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DEBUG(std::cerr << "********** INTERVALS **********\n");
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DEBUG(std::copy(intervals_.begin(), intervals_.end(),
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std::ostream_iterator<Interval>(std::cerr, "\n")));
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std::ostream_iterator<LiveInterval>(std::cerr, "\n")));
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DEBUG(std::cerr << "********** MACHINEINSTRS **********\n");
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DEBUG(
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for (MachineFunction::iterator mbbi = mf_->begin(), mbbe = mf_->end();
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@ -186,11 +186,12 @@ bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
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return true;
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}
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std::vector<Interval*> LiveIntervals::addIntervalsForSpills(const Interval& li,
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std::vector<LiveInterval*> LiveIntervals::addIntervalsForSpills(
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const LiveInterval& li,
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VirtRegMap& vrm,
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int slot)
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{
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std::vector<Interval*> added;
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std::vector<LiveInterval*> added;
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assert(li.weight != HUGE_VAL &&
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"attempt to spill already spilled interval!");
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@ -200,7 +201,7 @@ std::vector<Interval*> LiveIntervals::addIntervalsForSpills(const Interval& li,
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const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(li.reg);
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for (Interval::Ranges::const_iterator
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for (LiveInterval::Ranges::const_iterator
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i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
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unsigned index = getBaseIndex(i->first);
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unsigned end = getBaseIndex(i->second-1) + InstrSlots::NUM;
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@ -250,7 +251,7 @@ std::vector<Interval*> LiveIntervals::addIntervalsForSpills(const Interval& li,
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mi->SetMachineOperandReg(i, nReg);
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vrm.grow();
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vrm.assignVirt2StackSlot(nReg, slot);
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Interval& nI = getOrCreateInterval(nReg);
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LiveInterval& nI = getOrCreateInterval(nReg);
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assert(nI.empty());
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// the spill weight is now infinity as it
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// cannot be spilled again
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@ -280,7 +281,7 @@ void LiveIntervals::printRegName(unsigned reg) const
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void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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Interval& interval)
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LiveInterval& interval)
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{
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DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
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LiveVariables::VarInfo& vi = lv_->getVarInfo(interval.reg);
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@ -334,7 +335,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
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void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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Interval& interval)
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LiveInterval& interval)
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{
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DEBUG(std::cerr << "\t\tregister: "; printRegName(interval.reg));
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typedef LiveVariables::killed_iterator KillIter;
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@ -536,8 +537,8 @@ void LiveIntervals::joinIntervals()
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}
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}
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bool LiveIntervals::overlapsAliases(const Interval& lhs,
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const Interval& rhs) const
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bool LiveIntervals::overlapsAliases(const LiveInterval& lhs,
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const LiveInterval& rhs) const
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{
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assert(MRegisterInfo::isPhysicalRegister(lhs.reg) &&
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"first interval must describe a physical register");
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@ -552,24 +553,24 @@ bool LiveIntervals::overlapsAliases(const Interval& lhs,
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return false;
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}
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Interval& LiveIntervals::getOrCreateInterval(unsigned reg)
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LiveInterval& LiveIntervals::getOrCreateInterval(unsigned reg)
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{
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Reg2IntervalMap::iterator r2iit = r2iMap_.lower_bound(reg);
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if (r2iit == r2iMap_.end() || r2iit->first != reg) {
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intervals_.push_back(Interval(reg));
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intervals_.push_back(LiveInterval(reg));
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r2iit = r2iMap_.insert(r2iit, std::make_pair(reg, --intervals_.end()));
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}
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return *r2iit->second;
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}
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Interval::Interval(unsigned r)
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LiveInterval::LiveInterval(unsigned r)
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: reg(r),
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weight((MRegisterInfo::isPhysicalRegister(r) ? HUGE_VAL : 0.0F))
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{
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}
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bool Interval::spilled() const
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bool LiveInterval::spilled() const
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{
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return (weight == HUGE_VAL &&
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MRegisterInfo::isVirtualRegister(reg));
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@ -582,7 +583,7 @@ bool Interval::spilled() const
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// definition of the variable it represents. This is because slot 1 is
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// used (def slot) and spans up to slot 3 (store slot).
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//
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bool Interval::liveAt(unsigned index) const
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bool LiveInterval::liveAt(unsigned index) const
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{
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Range dummy(index, index+1);
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Ranges::const_iterator r = std::upper_bound(ranges.begin(),
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@ -609,7 +610,7 @@ bool Interval::liveAt(unsigned index) const
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//
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// A->overlaps(C) should return false since we want to be able to join
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// A and C.
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bool Interval::overlaps(const Interval& other) const
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bool LiveInterval::overlaps(const LiveInterval& other) const
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{
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Ranges::const_iterator i = ranges.begin();
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Ranges::const_iterator ie = ranges.end();
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@ -647,7 +648,7 @@ bool Interval::overlaps(const Interval& other) const
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return false;
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}
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void Interval::addRange(unsigned start, unsigned end)
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void LiveInterval::addRange(unsigned start, unsigned end)
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{
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assert(start < end && "Invalid range to add!");
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DEBUG(std::cerr << " +[" << start << ',' << end << ")");
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@ -661,7 +662,7 @@ void Interval::addRange(unsigned start, unsigned end)
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it = mergeRangesBackward(it);
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}
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void Interval::join(const Interval& other)
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void LiveInterval::join(const LiveInterval& other)
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{
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DEBUG(std::cerr << "\t\tjoining " << *this << " with " << other << '\n');
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Ranges::iterator cur = ranges.begin();
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@ -676,7 +677,8 @@ void Interval::join(const Interval& other)
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++numJoins;
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}
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Interval::Ranges::iterator Interval::mergeRangesForward(Ranges::iterator it)
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LiveInterval::Ranges::iterator LiveInterval::
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mergeRangesForward(Ranges::iterator it)
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{
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Ranges::iterator n;
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while ((n = next(it)) != ranges.end()) {
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@ -688,7 +690,8 @@ Interval::Ranges::iterator Interval::mergeRangesForward(Ranges::iterator it)
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return it;
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}
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Interval::Ranges::iterator Interval::mergeRangesBackward(Ranges::iterator it)
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LiveInterval::Ranges::iterator LiveInterval::
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mergeRangesBackward(Ranges::iterator it)
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{
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while (it != ranges.begin()) {
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Ranges::iterator p = prior(it);
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@ -703,14 +706,14 @@ Interval::Ranges::iterator Interval::mergeRangesBackward(Ranges::iterator it)
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return it;
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}
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std::ostream& llvm::operator<<(std::ostream& os, const Interval& li)
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std::ostream& llvm::operator<<(std::ostream& os, const LiveInterval& li)
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{
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os << "%reg" << li.reg << ',' << li.weight;
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if (li.empty())
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return os << "EMPTY";
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os << " = ";
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for (Interval::Ranges::const_iterator
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for (LiveInterval::Ranges::const_iterator
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i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
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os << "[" << i->first << "," << i->second << ")";
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}
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@ -30,7 +30,7 @@ namespace llvm {
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class MRegisterInfo;
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class VirtRegMap;
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struct Interval {
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struct LiveInterval {
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typedef std::pair<unsigned, unsigned> Range;
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typedef std::vector<Range> Ranges;
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unsigned reg; // the register of this interval
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@ -38,7 +38,7 @@ namespace llvm {
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// (number of uses *10^loopDepth)
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Ranges ranges; // the ranges in which this register is live
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explicit Interval(unsigned r);
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explicit LiveInterval(unsigned r);
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bool empty() const { return ranges.empty(); }
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@ -60,17 +60,17 @@ namespace llvm {
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bool liveAt(unsigned index) const;
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bool overlaps(const Interval& other) const;
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bool overlaps(const LiveInterval& other) const;
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void addRange(unsigned start, unsigned end);
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void join(const Interval& other);
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void join(const LiveInterval& other);
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bool operator<(const Interval& other) const {
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bool operator<(const LiveInterval& other) const {
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return start() < other.start();
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}
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bool operator==(const Interval& other) const {
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bool operator==(const LiveInterval& other) const {
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return reg == other.reg;
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}
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@ -79,12 +79,12 @@ namespace llvm {
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Ranges::iterator mergeRangesBackward(Ranges::iterator it);
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};
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std::ostream& operator<<(std::ostream& os, const Interval& li);
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std::ostream& operator<<(std::ostream& os, const LiveInterval& li);
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class LiveIntervals : public MachineFunctionPass
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{
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public:
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typedef std::list<Interval> Intervals;
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typedef std::list<LiveInterval> Intervals;
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private:
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MachineFunction* mf_;
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@ -148,7 +148,7 @@ namespace llvm {
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/// runOnMachineFunction - pass entry point
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virtual bool runOnMachineFunction(MachineFunction&);
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Interval& getInterval(unsigned reg) {
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LiveInterval& getInterval(unsigned reg) {
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assert(r2iMap_.count(reg)&& "Interval does not exist for register");
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return *r2iMap_.find(reg)->second;
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}
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@ -162,7 +162,7 @@ namespace llvm {
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Intervals& getIntervals() { return intervals_; }
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std::vector<Interval*> addIntervalsForSpills(const Interval& i,
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std::vector<LiveInterval*> addIntervalsForSpills(const LiveInterval& i,
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VirtRegMap& vrm,
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int slot);
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@ -184,18 +184,19 @@ namespace llvm {
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/// register def
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void handleVirtualRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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Interval& interval);
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LiveInterval& interval);
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/// handlePhysicalRegisterDef - update intervals for a
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/// physical register def
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void handlePhysicalRegisterDef(MachineBasicBlock* mbb,
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MachineBasicBlock::iterator mi,
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Interval& interval);
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LiveInterval& interval);
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bool overlapsAliases(const Interval& lhs, const Interval& rhs) const;
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bool overlapsAliases(const LiveInterval& lhs,
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const LiveInterval& rhs) const;
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Interval& getOrCreateInterval(unsigned reg);
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LiveInterval& getOrCreateInterval(unsigned reg);
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/// rep - returns the representative of this register
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unsigned rep(unsigned reg);
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@ -39,7 +39,7 @@ namespace {
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const TargetMachine* tm_;
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const MRegisterInfo* mri_;
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LiveIntervals* li_;
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typedef std::list<Interval*> IntervalPtrs;
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typedef std::list<LiveInterval*> IntervalPtrs;
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IntervalPtrs unhandled_, fixed_, active_, inactive_, handled_;
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std::auto_ptr<PhysRegTracker> prt_;
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@ -374,12 +374,12 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
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if (cur->weight <= minWeight) {
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DEBUG(std::cerr << "\t\t\tspilling(c): " << *cur << '\n';);
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int slot = vrm_->assignVirt2StackSlot(cur->reg);
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std::vector<Interval*> added =
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std::vector<LiveInterval*> added =
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li_->addIntervalsForSpills(*cur, *vrm_, slot);
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// merge added with unhandled
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std::vector<Interval*>::iterator addedIt = added.begin();
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std::vector<Interval*>::iterator addedItEnd = added.end();
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std::vector<LiveInterval*>::iterator addedIt = added.begin();
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std::vector<LiveInterval*>::iterator addedItEnd = added.end();
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for (IntervalPtrs::iterator i = unhandled_.begin(), e = unhandled_.end();
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i != e && addedIt != addedItEnd; ++i) {
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if ((*i)->start() > (*addedIt)->start())
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// otherwise we spill all intervals aliasing the register with
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// minimum weight, rollback to the interval with the earliest
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// start point and let the linear scan algorithm run again
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std::vector<Interval*> added;
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std::vector<LiveInterval*> added;
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assert(MRegisterInfo::isPhysicalRegister(minReg) &&
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"did not choose a register to spill?");
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std::vector<bool> toSpill(mri_->getNumRegs(), false);
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DEBUG(std::cerr << "\t\t\tspilling(a): " << **i << '\n');
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earliestStart = std::min(earliestStart, (*i)->start());
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int slot = vrm_->assignVirt2StackSlot((*i)->reg);
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std::vector<Interval*> newIs =
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std::vector<LiveInterval*> newIs =
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li_->addIntervalsForSpills(**i, *vrm_, slot);
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std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
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spilled.insert(reg);
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DEBUG(std::cerr << "\t\t\tspilling(i): " << **i << '\n');
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earliestStart = std::min(earliestStart, (*i)->start());
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int slot = vrm_->assignVirt2StackSlot((*i)->reg);
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std::vector<Interval*> newIs =
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std::vector<LiveInterval*> newIs =
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li_->addIntervalsForSpills(**i, *vrm_, slot);
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std::copy(newIs.begin(), newIs.end(), std::back_inserter(added));
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spilled.insert(reg);
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@ -496,10 +496,10 @@ void RA::assignRegOrStackSlotAtInterval(IntervalPtrs::value_type cur)
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}
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}
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std::sort(added.begin(), added.end(), less_ptr<Interval>());
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std::sort(added.begin(), added.end(), less_ptr<LiveInterval>());
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// merge added with unhandled
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std::vector<Interval*>::iterator addedIt = added.begin();
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std::vector<Interval*>::iterator addedItEnd = added.end();
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std::vector<LiveInterval*>::iterator addedIt = added.begin();
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std::vector<LiveInterval*>::iterator addedItEnd = added.end();
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for (IntervalPtrs::iterator i = unhandled_.begin(), e = unhandled_.end();
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i != e && addedIt != addedItEnd; ++i) {
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if ((*i)->start() > (*addedIt)->start())
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