maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Complete the SPE instruction set patterns 

This is the lead-up to having SPE codegen.  Add the rest of the
instructions, along with MC tests.

Differential Revision:  https://reviews.llvm.org/D44829

llvm-svn: 337346
This commit is contained in:
Justin Hibbits 2018-07-18 04:24:57 +00:00
parent ceb3cd96f7
commit 4fa4fa6a73
8 changed files with 1233 additions and 231 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

50
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
View File

@ -417,6 +417,51 @@ static DecodeStatus decodeMemRIX16Operands(MCInst &Inst, uint64_t Imm,
return MCDisassembler::Success;
}
static DecodeStatus decodeSPE8Operands(MCInst &Inst, uint64_t Imm,
int64_t Address, const void *Decoder) {
// Decode the spe8disp field (imm, reg), which has the low 5-bits as the
// displacement with 8-byte aligned, and the next 5 bits as the register #.
uint64_t Base = Imm >> 5;
uint64_t Disp = Imm & 0x1F;
assert(Base < 32 && "Invalid base register");
Inst.addOperand(MCOperand::createImm(Disp << 3));
Inst.addOperand(MCOperand::createReg(GP0Regs[Base]));
return MCDisassembler::Success;
}
static DecodeStatus decodeSPE4Operands(MCInst &Inst, uint64_t Imm,
int64_t Address, const void *Decoder) {
// Decode the spe4disp field (imm, reg), which has the low 5-bits as the
// displacement with 4-byte aligned, and the next 5 bits as the register #.
uint64_t Base = Imm >> 5;
uint64_t Disp = Imm & 0x1F;
assert(Base < 32 && "Invalid base register");
Inst.addOperand(MCOperand::createImm(Disp << 2));
Inst.addOperand(MCOperand::createReg(GP0Regs[Base]));
return MCDisassembler::Success;
}
static DecodeStatus decodeSPE2Operands(MCInst &Inst, uint64_t Imm,
int64_t Address, const void *Decoder) {
// Decode the spe2disp field (imm, reg), which has the low 5-bits as the
// displacement with 2-byte aligned, and the next 5 bits as the register #.
uint64_t Base = Imm >> 5;
uint64_t Disp = Imm & 0x1F;
assert(Base < 32 && "Invalid base register");
Inst.addOperand(MCOperand::createImm(Disp << 1));
Inst.addOperand(MCOperand::createReg(GP0Regs[Base]));
return MCDisassembler::Success;
}
static DecodeStatus decodeCRBitMOperand(MCInst &Inst, uint64_t Imm,
int64_t Address, const void *Decoder) {
// The cr bit encoding is 0x80 >> cr_reg_num.
@ -450,6 +495,11 @@ DecodeStatus PPCDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
decodeInstruction(DecoderTableQPX32, MI, Inst, Address, this, STI);
if (result != MCDisassembler::Fail)
return result;
} else if (STI.getFeatureBits()[PPC::FeatureSPE]) {
DecodeStatus result =
decodeInstruction(DecoderTableSPE32, MI, Inst, Address, this, STI);
if (result != MCDisassembler::Fail)
return result;
}
return decodeInstruction(DecoderTable32, MI, Inst, Address, this, STI);

5
llvm/lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -819,16 +819,19 @@ def spe8dis : Operand<iPTR> { // SPE displacement where the imm is 8-aligned.
let PrintMethod = "printMemRegImm";
let MIOperandInfo = (ops dispSPE8:$imm, ptr_rc_nor0:$reg);
let EncoderMethod = "getSPE8DisEncoding";
let DecoderMethod = "decodeSPE8Operands";
}
def spe4dis : Operand<iPTR> { // SPE displacement where the imm is 4-aligned.
let PrintMethod = "printMemRegImm";
let MIOperandInfo = (ops dispSPE4:$imm, ptr_rc_nor0:$reg);
let EncoderMethod = "getSPE4DisEncoding";
let DecoderMethod = "decodeSPE4Operands";
}
def spe2dis : Operand<iPTR> { // SPE displacement where the imm is 2-aligned.
let PrintMethod = "printMemRegImm";
let MIOperandInfo = (ops dispSPE2:$imm, ptr_rc_nor0:$reg);
let EncoderMethod = "getSPE2DisEncoding";
let DecoderMethod = "decodeSPE2Operands";
}
// A single-register address. This is used with the SjLj
@ -883,7 +886,7 @@ def HasSYNC : Predicate<"!PPCSubTarget->hasOnlyMSYNC()">;
def IsPPC4xx : Predicate<"PPCSubTarget->isPPC4xx()">;
def IsPPC6xx : Predicate<"PPCSubTarget->isPPC6xx()">;
def IsE500 : Predicate<"PPCSubTarget->isE500()">;
def HasSPE : Predicate<"PPCSubTarget->HasSPE()">;
def HasSPE : Predicate<"PPCSubTarget->hasSPE()">;
def HasICBT : Predicate<"PPCSubTarget->hasICBT()">;
def HasPartwordAtomics : Predicate<"PPCSubTarget->hasPartwordAtomics()">;
def NoNaNsFPMath : Predicate<"TM.Options.NoNaNsFPMath">;

719
llvm/lib/Target/PowerPC/PPCInstrSPE.td
View File

@ -12,14 +12,51 @@
//
//===----------------------------------------------------------------------===//
class EVXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
class EFXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : I<4, OOL, IOL, asmstr, itin> {
bits<5> RT;
bits<5> RA;
bits<5> RB;
let Pattern = [];
let Inst{6-10} = RT;
let Inst{11-15} = RA;
let Inst{16-20} = RB;
let Inst{21-31} = xo;
}
class EFXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : EFXForm_1<xo, OOL, IOL, asmstr, itin> {
let RB = 0;
}
class EFXForm_2a<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : EFXForm_1<xo, OOL, IOL, asmstr, itin> {
let RA = 0;
}
class EFXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : I<4, OOL, IOL, asmstr, itin> {
bits<3> crD;
bits<5> RA;
bits<5> RB;
let Pattern = [];
let Inst{6-8} = crD;
let Inst{9-10} = 0;
let Inst{11-15} = RA;
let Inst{16-20} = RB;
let Inst{21-31} = xo;
}
class EVXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : I<4, OOL, IOL, asmstr, itin> {
bits<5> RT;
bits<5> RA;
bits<5> RB;
let Inst{6-10} = RT;
let Inst{11-15} = RA;
let Inst{16-20} = RB;
@ -27,18 +64,24 @@ class EVXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
}
class EVXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : EVXForm_1<xo, OOL, IOL, asmstr, itin> {
InstrItinClass itin> :
EVXForm_1<xo, OOL, IOL, asmstr, itin> {
let RB = 0;
}
class EVXForm_2a<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> :
EVXForm_1<xo, OOL, IOL, asmstr, itin> {
let RA = 0;
}
class EVXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : I<4, OOL, IOL, asmstr, itin> {
InstrItinClass itin> :
I<4, OOL, IOL, asmstr, itin> {
bits<3> crD;
bits<5> RA;
bits<5> RB;
let Pattern = [];
let Inst{6-8} = crD;
let Inst{9-10} = 0;
let Inst{11-15} = RA;
@ -46,6 +89,21 @@ class EVXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
let Inst{21-31} = xo;
}
class EVXForm_4<bits<8> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> :
I<4, OOL, IOL, asmstr, itin> {
bits<3> crD;
bits<5> RA;
bits<5> RB;
bits<5> RT;
let Inst{6-10} = RT;
let Inst{11-15} = RA;
let Inst{16-20} = RB;
let Inst{21-28} = xo;
let Inst{29-31} = crD;
}
class EVXForm_D<bits<11> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin> : I<4, OOL, IOL, asmstr, itin> {
bits<5> RT;
@ -68,380 +126,595 @@ class EVXForm_D<bits<11> xo, dag OOL, dag IOL, string asmstr,
let Inst{21-31} = xo;
}
let Predicates = [HasSPE], isAsmParserOnly = 1 in {
def EVLDD : EVXForm_D<769, (outs gprc:$RT), (ins spe8dis:$dst),
"evldd $RT, $dst", IIC_VecFP>;
def EVLDW : EVXForm_D<771, (outs gprc:$RT), (ins spe8dis:$dst),
"evldw $RT, $dst", IIC_VecFP>;
def EVLDH : EVXForm_D<773, (outs gprc:$RT), (ins spe8dis:$dst),
"evldh $RT, $dst", IIC_VecFP>;
def EVLHHESPLAT : EVXForm_D<777, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhesplat $RT, $dst", IIC_VecFP>;
def EVLHHOUSPLAT : EVXForm_D<781, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhousplat $RT, $dst", IIC_VecFP>;
def EVLHHOSSPLAT : EVXForm_D<783, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhossplat $RT, $dst", IIC_VecFP>;
def EVLWHE : EVXForm_D<785, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhe $RT, $dst", IIC_VecFP>;
def EVLWHOU : EVXForm_D<789, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhou $RT, $dst", IIC_VecFP>;
def EVLWHOS : EVXForm_D<791, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhos $RT, $dst", IIC_VecFP>;
def EVLWWSPLAT : EVXForm_D<793, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwwsplat $RT, $dst", IIC_VecFP>;
def EVLWHSPLAT : EVXForm_D<797, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhsplat $RT, $dst", IIC_VecFP>;
def EVSTDD : EVXForm_D<801, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdd $RT, $dst", IIC_VecFP>;
def EVSTDH : EVXForm_D<805, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdh $RT, $dst", IIC_VecFP>;
def EVSTDW : EVXForm_D<803, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdw $RT, $dst", IIC_VecFP>;
def EVSTWHE : EVXForm_D<817, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwhe $RT, $dst", IIC_VecFP>;
def EVSTWHO : EVXForm_D<821, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwho $RT, $dst", IIC_VecFP>;
def EVSTWWE : EVXForm_D<825, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwwe $RT, $dst", IIC_VecFP>;
def EVSTWWO : EVXForm_D<829, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwwo $RT, $dst", IIC_VecFP>;
def EVMRA : EVXForm_1<1220, (outs gprc:$RT), (ins gprc:$RA),
"evmra $RT, $RA", IIC_VecFP> {
let RB = 0;
}
let DecoderNamespace = "SPE", Predicates = [HasSPE] in {
def BRINC : EVXForm_1<527, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"brinc $RT, $RA, $RB", IIC_VecFP>;
"brinc $RT, $RA, $RB", IIC_IntSimple>;
// Double-precision floating point
def EFDABS : EFXForm_2<740, (outs gprc:$RT), (ins gprc:$RA),
"efdabs $RT, $RA", IIC_FPDGeneral>;
def EFDADD : EFXForm_1<736, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efdadd $RT, $RA, $RB", IIC_FPAddSub>;
def EFDCFS : EFXForm_2a<751, (outs gprc:$RT), (ins gprc:$RB),
"efdcfs $RT, $RB", IIC_FPDGeneral>;
def EFDCFSF : EFXForm_2a<755, (outs gprc:$RT), (ins gprc:$RB),
"efdcfsf $RT, $RB", IIC_FPDGeneral>;
def EFDCFSI : EFXForm_2a<753, (outs gprc:$RT), (ins gprc:$RB),
"efdcfsi $RT, $RB", IIC_FPDGeneral>;
def EFDCFSID : EFXForm_2a<739, (outs gprc:$RT), (ins gprc:$RB),
"efdcfsid $RT, $RB", IIC_FPDGeneral>;
def EFDCFUF : EFXForm_2a<754, (outs gprc:$RT), (ins gprc:$RB),
"efdcfuf $RT, $RB", IIC_FPDGeneral>;
def EFDCFUI : EFXForm_2a<752, (outs gprc:$RT), (ins gprc:$RB),
"efdcfui $RT, $RB", IIC_FPDGeneral>;
def EFDCFUID : EFXForm_2a<738, (outs gprc:$RT), (ins gprc:$RB),
"efdcfuid $RT, $RB", IIC_FPDGeneral>;
let isCompare = 1 in {
def EFDCMPEQ : EFXForm_3<750, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdcmpeq $crD, $RA, $RB", IIC_FPDGeneral>;
def EFDCMPGT : EFXForm_3<748, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdcmpgt $crD, $RA, $RB", IIC_FPDGeneral>;
def EFDCMPLT : EFXForm_3<749, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdcmplt $crD, $RA, $RB", IIC_FPDGeneral>;
}
def EFDCTSF : EFXForm_2a<759, (outs gprc:$RT), (ins gprc:$RB),
"efdctsf $RT, $RB", IIC_FPDGeneral>;
def EFDCTSI : EFXForm_2a<757, (outs gprc:$RT), (ins gprc:$RB),
"efdctsi $RT, $RB", IIC_FPDGeneral>;
def EFDCTSIDZ : EFXForm_2a<747, (outs gprc:$RT), (ins gprc:$RB),
"efdctsidz $RT, $RB", IIC_FPDGeneral>;
def EFDCTSIZ : EFXForm_2a<762, (outs gprc:$RT), (ins gprc:$RB),
"efdctsiz $RT, $RB", IIC_FPDGeneral>;
def EFDCTUF : EFXForm_2a<758, (outs gprc:$RT), (ins gprc:$RB),
"efdctuf $RT, $RB", IIC_FPDGeneral>;
def EFDCTUI : EFXForm_2a<756, (outs gprc:$RT), (ins gprc:$RB),
"efdctui $RT, $RB", IIC_FPDGeneral>;
def EFDCTUIDZ : EFXForm_2a<746, (outs gprc:$RT), (ins gprc:$RB),
"efdctuidz $RT, $RB", IIC_FPDGeneral>;
def EFDCTUIZ : EFXForm_2a<760, (outs gprc:$RT), (ins gprc:$RB),
"efdctuiz $RT, $RB", IIC_FPDGeneral>;
def EFDDIV : EFXForm_1<745, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efddiv $RT, $RA, $RB", IIC_FPDivD>;
def EFDMUL : EFXForm_1<744, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efdmul $RT, $RA, $RB", IIC_FPDGeneral>;
def EFDNABS : EFXForm_2<741, (outs gprc:$RT), (ins gprc:$RA),
"efdnabs $RT, $RA", IIC_FPDGeneral>;
def EFDNEG : EFXForm_2<742, (outs gprc:$RT), (ins gprc:$RA),
"efdneg $RT, $RA", IIC_FPDGeneral>;
def EFDSUB : EFXForm_1<737, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efdsub $RT, $RA, $RB", IIC_FPDGeneral>;
let isCompare = 1 in {
def EFDTSTEQ : EFXForm_3<766, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdtsteq $crD, $RA, $RB", IIC_FPDGeneral>;
def EFDTSTGT : EFXForm_3<764, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdtstgt $crD, $RA, $RB", IIC_FPDGeneral>;
def EFDTSTLT : EFXForm_3<765, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efdtstlt $crD, $RA, $RB", IIC_FPDGeneral>;
}
// Single-precision floating point
def EFSABS : EFXForm_2<708, (outs gprc:$RT), (ins gprc:$RA),
"efsabs $RT, $RA", IIC_FPSGeneral>;
def EFSADD : EFXForm_1<704, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efsadd $RT, $RA, $RB", IIC_FPAddSub>;
def EFSCFD : EFXForm_2a<719, (outs gprc:$RT), (ins gprc:$RB),
"efscfd $RT, $RB", IIC_FPSGeneral>;
def EFSCFSF : EFXForm_2a<723, (outs gprc:$RT), (ins gprc:$RB),
"efscfsf $RT, $RB", IIC_FPSGeneral>;
def EFSCFSI : EFXForm_2a<721, (outs gprc:$RT), (ins gprc:$RB),
"efscfsi $RT, $RB", IIC_FPSGeneral>;
def EFSCFUF : EFXForm_2a<722, (outs gprc:$RT), (ins gprc:$RB),
"efscfuf $RT, $RB", IIC_FPSGeneral>;
def EFSCFUI : EFXForm_2a<720, (outs gprc:$RT), (ins gprc:$RB),
"efscfui $RT, $RB", IIC_FPSGeneral>;
let isCompare = 1 in {
def EFSCMPEQ : EFXForm_3<718, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efscmpeq $crD, $RA, $RB", IIC_FPCompare>;
def EFSCMPGT : EFXForm_3<716, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efscmpgt $crD, $RA, $RB", IIC_FPCompare>;
def EFSCMPLT : EFXForm_3<717, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efscmplt $crD, $RA, $RB", IIC_FPCompare>;
}
def EFSCTSF : EFXForm_2a<727, (outs gprc:$RT), (ins gprc:$RB),
"efsctsf $RT, $RB", IIC_FPSGeneral>;
def EFSCTSI : EFXForm_2a<725, (outs gprc:$RT), (ins gprc:$RB),
"efsctsi $RT, $RB", IIC_FPSGeneral>;
def EFSCTSIZ : EFXForm_2a<730, (outs gprc:$RT), (ins gprc:$RB),
"efsctsiz $RT, $RB", IIC_FPSGeneral>;
def EFSCTUF : EFXForm_2a<726, (outs gprc:$RT), (ins gprc:$RB),
"efsctuf $RT, $RB", IIC_FPSGeneral>;
def EFSCTUI : EFXForm_2a<724, (outs gprc:$RT), (ins gprc:$RB),
"efsctui $RT, $RB", IIC_FPSGeneral>;
def EFSCTUIZ : EFXForm_2a<728, (outs gprc:$RT), (ins gprc:$RB),
"efsctuiz $RT, $RB", IIC_FPSGeneral>;
def EFSDIV : EFXForm_1<713, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efsdiv $RT, $RA, $RB", IIC_FPDivD>;
def EFSMUL : EFXForm_1<712, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efsmul $RT, $RA, $RB", IIC_FPGeneral>;
def EFSNABS : EFXForm_2<709, (outs gprc:$RT), (ins gprc:$RA),
"efsnabs $RT, $RA", IIC_FPGeneral>;
def EFSNEG : EFXForm_2<710, (outs gprc:$RT), (ins gprc:$RA),
"efsneg $RT, $RA", IIC_FPGeneral>;
def EFSSUB : EFXForm_1<705, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"efssub $RT, $RA, $RB", IIC_FPSGeneral>;
let isCompare = 1 in {
def EFSTSTEQ : EFXForm_3<734, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efststeq $crD, $RA, $RB", IIC_FPCompare>;
def EFSTSTGT : EFXForm_3<732, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efststgt $crD, $RA, $RB", IIC_FPCompare>;
def EFSTSTLT : EFXForm_3<733, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"efststlt $crD, $RA, $RB", IIC_FPCompare>;
}
// SPE Vector operations
def EVABS : EVXForm_2<520, (outs gprc:$RT), (ins gprc:$RA),
"evabs $RT, $RA", IIC_VecFP>;
"evabs $RT, $RA", IIC_VecGeneral>;
def EVADDIW : EVXForm_1<514, (outs gprc:$RT), (ins gprc:$RA, u5imm:$RB),
"evaddiw $RT, $RB, $RA", IIC_VecFP>;
"evaddiw $RT, $RB, $RA", IIC_VecGeneral>;
def EVADDSMIAAW : EVXForm_2<1225, (outs gprc:$RT), (ins gprc:$RA),
"evaddsmiaaw $RT, $RA", IIC_VecFP>;
"evaddsmiaaw $RT, $RA", IIC_VecComplex>;
def EVADDSSIAAW : EVXForm_2<1217, (outs gprc:$RT), (ins gprc:$RA),
"evaddssiaaw $RT, $RA", IIC_VecFP>;
"evaddssiaaw $RT, $RA", IIC_VecComplex>;
def EVADDUSIAAW : EVXForm_2<1216, (outs gprc:$RT), (ins gprc:$RA),
"evaddusiaaw $RT, $RA", IIC_VecFP>;
"evaddusiaaw $RT, $RA", IIC_VecComplex>;
def EVADDUMIAAW : EVXForm_2<1224, (outs gprc:$RT), (ins gprc:$RA),
"evaddumiaaw $RT, $RA", IIC_VecFP>;
"evaddumiaaw $RT, $RA", IIC_VecComplex>;
def EVADDW : EVXForm_1<512, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evaddw $RT, $RA, $RB", IIC_VecFP>;
"evaddw $RT, $RA, $RB", IIC_VecGeneral>;
def EVAND : EVXForm_1<529, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evand $RT, $RA, $RB", IIC_VecFP>;
"evand $RT, $RA, $RB", IIC_VecGeneral>;
def EVANDC : EVXForm_1<530, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evandc $RT, $RA, $RB", IIC_VecFP>;
"evandc $RT, $RA, $RB", IIC_VecGeneral>;
let isCompare = 1 in {
def EVCMPEQ : EVXForm_3<564, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evcmpeq $crD, $RA, $RB", IIC_VecFP>;
"evcmpeq $crD, $RA, $RB", IIC_VecGeneral>;
def EVCMPGTS : EVXForm_3<561, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evcmpgts $crD, $RA, $RB", IIC_VecFP>;
"evcmpgts $crD, $RA, $RB", IIC_VecGeneral>;
def EVCMPGTU : EVXForm_3<560, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evcmpgtu $crD, $RA, $RB", IIC_VecFP>;
"evcmpgtu $crD, $RA, $RB", IIC_VecGeneral>;
def EVCMPLTS : EVXForm_3<563, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evcmplts $crD, $RA, $RB", IIC_VecFP>;
"evcmplts $crD, $RA, $RB", IIC_VecGeneral>;
def EVCMPLTU : EVXForm_3<562, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evcmpltu $crD, $RA, $RB", IIC_VecFP>;
"evcmpltu $crD, $RA, $RB", IIC_VecGeneral>;
}
def EVCNTLSW : EVXForm_2<526, (outs gprc:$RT), (ins gprc:$RA),
"evcntlsw $RT, $RA", IIC_VecFP>;
"evcntlsw $RT, $RA", IIC_VecGeneral>;
def EVCNTLZW : EVXForm_2<525, (outs gprc:$RT), (ins gprc:$RA),
"evcntlzw $RT, $RA", IIC_VecFP>;
"evcntlzw $RT, $RA", IIC_VecGeneral>;
def EVDIVWS : EVXForm_1<1222, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evdivws $RT, $RA, $RB", IIC_VecFP>;
"evdivws $RT, $RA, $RB", IIC_VecComplex>;
def EVDIVWU : EVXForm_1<1223, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evdivwu $RT, $RA, $RB", IIC_VecFP>;
"evdivwu $RT, $RA, $RB", IIC_VecComplex>;
def EVEQV : EVXForm_1<537, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"eveqv $RT, $RA, $RB", IIC_VecFP>;
"eveqv $RT, $RA, $RB", IIC_VecGeneral>;
def EVEXTSB : EVXForm_2<522, (outs gprc:$RT), (ins gprc:$RA),
"evextsb $RT, $RA", IIC_VecFP>;
"evextsb $RT, $RA", IIC_VecGeneral>;
def EVEXTSH : EVXForm_2<523, (outs gprc:$RT), (ins gprc:$RA),
"evextsh $RT, $RA", IIC_VecFP>;
"evextsh $RT, $RA", IIC_VecGeneral>;
def EVLDDX : EVXForm_1<768, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlddx $RT, $RA, $RB", IIC_VecFP>;
def EVLDWX : EVXForm_1<770, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evldwx $RT, $RA, $RB", IIC_VecFP>;
def EVLDHX : EVXForm_1<772, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evldhx $RT, $RA, $RB", IIC_VecFP>;
def EVLHHESPLATX : EVXForm_1<776, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlhhesplatx $RT, $RA, $RB", IIC_VecFP>;
def EVLHHOUSPLATX : EVXForm_1<780, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlhhousplatx $RT, $RA, $RB", IIC_VecFP>;
def EVLHHOSSPLATX : EVXForm_1<782, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlhhossplatx $RT, $RA, $RB", IIC_VecFP>;
def EVLWHEX : EVXForm_1<784, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlwhex $RT, $RA, $RB", IIC_VecFP>;
def EVLWHOUX : EVXForm_1<788, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlwhoux $RT, $RA, $RB", IIC_VecFP>;
def EVLWHOSX : EVXForm_1<790, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlwhosx $RT, $RA, $RB", IIC_VecFP>;
def EVLWWSPLATX : EVXForm_1<792, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlwwsplatx $RT, $RA, $RB", IIC_VecFP>;
def EVLWHSPLATX : EVXForm_1<796, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evlwhsplatx $RT, $RA, $RB", IIC_VecFP>;
def EVFSABS : EVXForm_2<644, (outs gprc:$RT), (ins gprc:$RA),
"evfsabs $RT, $RA", IIC_VecGeneral>;
def EVFSADD : EVXForm_1<640, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evfsadd $RT, $RA, $RB", IIC_VecComplex>;
def EVFSCFSF : EVXForm_2a<659, (outs gprc:$RT), (ins gprc:$RB),
"evfscfsf $RT, $RB", IIC_VecComplex>;
def EVFSCFSI : EVXForm_2a<657, (outs gprc:$RT), (ins gprc:$RB),
"evfscfsi $RT, $RB", IIC_VecComplex>;
def EVFSCFUF : EVXForm_2a<658, (outs gprc:$RT), (ins gprc:$RB),
"evfscfuf $RT, $RB", IIC_VecComplex>;
def EVFSCFUI : EVXForm_2a<650, (outs gprc:$RT), (ins gprc:$RB),
"evfscfui $RT, $RB", IIC_VecComplex>;
let isCompare = 1 in {
def EVFSCMPEQ : EVXForm_3<654, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfscmpeq $crD, $RA, $RB", IIC_FPSGeneral>;
def EVFSCMPGT : EVXForm_3<652, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfscmpgt $crD, $RA, $RB", IIC_FPSGeneral>;
def EVFSCMPLT : EVXForm_3<653, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfscmplt $crD, $RA, $RB", IIC_FPSGeneral>;
}
def EVFSCTSF : EVXForm_2a<663, (outs gprc:$RT), (ins gprc:$RB),
"evfsctsf $RT, $RB", IIC_VecComplex>;
def EVFSCTSI : EVXForm_2a<661, (outs gprc:$RT), (ins gprc:$RB),
"evfsctsi $RT, $RB", IIC_VecComplex>;
def EVFSCTSIZ : EVXForm_2a<666, (outs gprc:$RT), (ins gprc:$RB),
"evfsctsiz $RT, $RB", IIC_VecComplex>;
def EVFSCTUF : EVXForm_2a<662, (outs gprc:$RT), (ins gprc:$RB),
"evfsctsf $RT, $RB", IIC_VecComplex>;
def EVFSCTUI : EVXForm_2a<660, (outs gprc:$RT), (ins gprc:$RB),
"evfsctui $RT, $RB", IIC_VecComplex>;
def EVFSCTUIZ : EVXForm_2a<664, (outs gprc:$RT), (ins gprc:$RB),
"evfsctsiz $RT, $RB", IIC_VecComplex>;
def EVFSDIV : EVXForm_1<649, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evfsdiv $RT, $RA, $RB", IIC_FPDivD>;
def EVFSMUL : EVXForm_1<648, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evfsmul $RT, $RA, $RB", IIC_VecComplex>;
def EVFSNABS : EVXForm_2<645, (outs gprc:$RT), (ins gprc:$RA),
"evfsnabs $RT, $RA", IIC_VecGeneral>;
def EVFSNEG : EVXForm_2<646, (outs gprc:$RT), (ins gprc:$RA),
"evfsneg $RT, $RA", IIC_VecGeneral>;
def EVFSSUB : EVXForm_1<641, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evfssub $RT, $RA, $RB", IIC_VecComplex>;
let isCompare = 1 in {
def EVFSTSTEQ : EVXForm_3<670, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfststeq $crD, $RA, $RB", IIC_VecGeneral>;
def EVFSTSTGT : EVXForm_3<668, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfststgt $crD, $RA, $RB", IIC_VecGeneral>;
def EVFSTSTLT : EVXForm_3<669, (outs crrc:$crD), (ins gprc:$RA, gprc:$RB),
"evfststlt $crD, $RA, $RB", IIC_VecGeneral>;
}
def EVLDD : EVXForm_D<769, (outs gprc:$RT), (ins spe8dis:$dst),
"evldd $RT, $dst", IIC_LdStLoad>;
def EVLDDX : EVXForm_1<768, (outs gprc:$RT), (ins memrr:$src),
"evlddx $RT, $src", IIC_LdStLoad>;
def EVLDH : EVXForm_D<773, (outs gprc:$RT), (ins spe8dis:$dst),
"evldh $RT, $dst", IIC_LdStLoad>;
def EVLDHX : EVXForm_1<772, (outs gprc:$RT), (ins memrr:$src),
"evldhx $RT, $src", IIC_LdStLoad>;
def EVLDW : EVXForm_D<771, (outs gprc:$RT), (ins spe8dis:$dst),
"evldw $RT, $dst", IIC_LdStLoad>;
def EVLDWX : EVXForm_1<770, (outs gprc:$RT), (ins memrr:$src),
"evldwx $RT, $src", IIC_LdStLoad>;
def EVLHHESPLAT : EVXForm_D<777, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhesplat $RT, $dst", IIC_LdStLoad>;
def EVLHHESPLATX : EVXForm_1<776, (outs gprc:$RT), (ins memrr:$src),
"evlhhesplatx $RT, $src", IIC_LdStLoad>;
def EVLHHOUSPLAT : EVXForm_D<781, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhousplat $RT, $dst", IIC_LdStLoad>;
def EVLHHOUSPLATX : EVXForm_1<780, (outs gprc:$RT), (ins memrr:$src),
"evlhhousplatx $RT, $src", IIC_LdStLoad>;
def EVLHHOSSPLAT : EVXForm_D<783, (outs gprc:$RT), (ins spe2dis:$dst),
"evlhhossplat $RT, $dst", IIC_LdStLoad>;
def EVLHHOSSPLATX : EVXForm_1<782, (outs gprc:$RT), (ins memrr:$src),
"evlhhossplatx $RT, $src", IIC_LdStLoad>;
def EVLWHE : EVXForm_D<785, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhe $RT, $dst", IIC_LdStLoad>;
def EVLWHEX : EVXForm_1<784, (outs gprc:$RT), (ins memrr:$src),
"evlwhex $RT, $src", IIC_LdStLoad>;
def EVLWHOS : EVXForm_D<791, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhos $RT, $dst", IIC_LdStLoad>;
def EVLWHOSX : EVXForm_1<790, (outs gprc:$RT), (ins memrr:$src),
"evlwhosx $RT, $src", IIC_LdStLoad>;
def EVLWHOU : EVXForm_D<789, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhou $RT, $dst", IIC_LdStLoad>;
def EVLWHOUX : EVXForm_1<788, (outs gprc:$RT), (ins memrr:$src),
"evlwhoux $RT, $src", IIC_LdStLoad>;
def EVLWHSPLAT : EVXForm_D<797, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwhsplat $RT, $dst", IIC_LdStLoad>;
def EVLWHSPLATX : EVXForm_1<796, (outs gprc:$RT), (ins memrr:$src),
"evlwhsplatx $RT, $src", IIC_LdStLoad>;
def EVLWWSPLAT : EVXForm_D<793, (outs gprc:$RT), (ins spe4dis:$dst),
"evlwwsplat $RT, $dst", IIC_LdStLoad>;
def EVLWWSPLATX : EVXForm_1<792, (outs gprc:$RT), (ins memrr:$src),
"evlwwsplatx $RT, $src", IIC_LdStLoad>;
def EVMERGEHI : EVXForm_1<556, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmergehi $RT, $RA, $RB", IIC_VecFP>;
"evmergehi $RT, $RA, $RB", IIC_VecGeneral>;
def EVMERGELO : EVXForm_1<557, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmergelo $RT, $RA, $RB", IIC_VecFP>;
"evmergelo $RT, $RA, $RB", IIC_VecGeneral>;
def EVMERGEHILO : EVXForm_1<558, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmergehilo $RT, $RA, $RB", IIC_VecFP>;
"evmergehilo $RT, $RA, $RB", IIC_VecGeneral>;
def EVMERGELOHI : EVXForm_1<559, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmergelohi $RT, $RA, $RB", IIC_VecFP>;
"evmergelohi $RT, $RA, $RB", IIC_VecGeneral>;
def EVMHEGSMFAA : EVXForm_1<1323, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegsmfaa $RT, $RA, $RB", IIC_VecFP>;
"evmhegsmfaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEGSMFAN : EVXForm_1<1451, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegsmfan $RT, $RA, $RB", IIC_VecFP>;
"evmhegsmfan $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEGSMIAA : EVXForm_1<1321, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegsmiaa $RT, $RA, $RB", IIC_VecFP>;
"evmhegsmiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEGSMIAN : EVXForm_1<1449, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegsmian $RT, $RA, $RB", IIC_VecFP>;
"evmhegsmian $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEGUMIAA : EVXForm_1<1320, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegumiaa $RT, $RA, $RB", IIC_VecFP>;
"evmhegumiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEGUMIAN : EVXForm_1<1448, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhegumian $RT, $RA, $RB", IIC_VecFP>;
"evmhegumian $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMF : EVXForm_1<1035, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmf $RT, $RA, $RB", IIC_VecFP>;
"evmhesmf $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMFA : EVXForm_1<1067, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmfa $RT, $RA, $RB", IIC_VecFP>;
"evmhesmfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMFAAW : EVXForm_1<1291, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmfaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhesmfaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMFANW : EVXForm_1<1419, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmfanw $RT, $RA, $RB", IIC_VecFP>;
"evmhesmfanw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMI : EVXForm_1<1033, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmi $RT, $RA, $RB", IIC_VecFP>;
"evmhesmi $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMIA : EVXForm_1<1065, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmia $RT, $RA, $RB", IIC_VecFP>;
"evmhesmia $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMIAAW : EVXForm_1<1289, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhesmiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESMIANW : EVXForm_1<1417, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhesmianw $RT, $RA, $RB", IIC_VecFP>;
"evmhesmianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSF : EVXForm_1<1027, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessf $RT, $RA, $RB", IIC_VecFP>;
"evmhessf $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSFA : EVXForm_1<1059, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessfa $RT, $RA, $RB", IIC_VecFP>;
"evmhessfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSFAAW : EVXForm_1<1283, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessfaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhessfaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSFANW : EVXForm_1<1411, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessfanw $RT, $RA, $RB", IIC_VecFP>;
"evmhessfanw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSIAAW : EVXForm_1<1281, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhessiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHESSIANW : EVXForm_1<1409, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhessianw $RT, $RA, $RB", IIC_VecFP>;
"evmhessianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUMI : EVXForm_1<1032, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheumi $RT, $RA, $RB", IIC_VecFP>;
"evmheumi $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUMIA : EVXForm_1<1064, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheumia $RT, $RA, $RB", IIC_VecFP>;
"evmheumia $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUMIAAW : EVXForm_1<1288, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheumiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmheumiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUMIANW : EVXForm_1<1416, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheumianw $RT, $RA, $RB", IIC_VecFP>;
"evmheumianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUSIAAW : EVXForm_1<1280, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheusiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmheusiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHEUSIANW : EVXForm_1<1408, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmheusianw $RT, $RA, $RB", IIC_VecFP>;
"evmheusianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGSMFAA : EVXForm_1<1327, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogsmfaa $RT, $RA, $RB", IIC_VecFP>;
"evmhogsmfaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGSMFAN : EVXForm_1<1455, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogsmfan $RT, $RA, $RB", IIC_VecFP>;
"evmhogsmfan $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGSMIAA : EVXForm_1<1325, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogsmiaa $RT, $RA, $RB", IIC_VecFP>;
"evmhogsmiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGSMIAN : EVXForm_1<1453, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogsmian $RT, $RA, $RB", IIC_VecFP>;
"evmhogsmian $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGUMIAA : EVXForm_1<1324, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogumiaa $RT, $RA, $RB", IIC_VecFP>;
"evmhogumiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOGUMIAN : EVXForm_1<1452, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhogumian $RT, $RA, $RB", IIC_VecFP>;
"evmhogumian $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMF : EVXForm_1<1039, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmf $RT, $RA, $RB", IIC_VecFP>;
"evmhosmf $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMFA : EVXForm_1<1071, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmfa $RT, $RA, $RB", IIC_VecFP>;
"evmhosmfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMFAAW : EVXForm_1<1295, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmfaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhosmfaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMFANW : EVXForm_1<1423, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmfanw $RT, $RA, $RB", IIC_VecFP>;
"evmhosmfanw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMI : EVXForm_1<1037, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmi $RT, $RA, $RB", IIC_VecFP>;
"evmhosmi $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMIA : EVXForm_1<1069, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmia $RT, $RA, $RB", IIC_VecFP>;
"evmhosmia $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMIAAW : EVXForm_1<1293, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhosmiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSMIANW : EVXForm_1<1421, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhosmianw $RT, $RA, $RB", IIC_VecFP>;
"evmhosmianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSF : EVXForm_1<1031, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossf $RT, $RA, $RB", IIC_VecFP>;
"evmhossf $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSFA : EVXForm_1<1063, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossfa $RT, $RA, $RB", IIC_VecFP>;
"evmhossfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSFAAW : EVXForm_1<1287, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossfaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhossfaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSFANW : EVXForm_1<1415, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossfanw $RT, $RA, $RB", IIC_VecFP>;
"evmhossfanw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSIAAW : EVXForm_1<1285, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhossiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOSSIANW : EVXForm_1<1413, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhossianw $RT, $RA, $RB", IIC_VecFP>;
"evmhossianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUMI : EVXForm_1<1036, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhoumi $RT, $RA, $RB", IIC_VecFP>;
"evmhoumi $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUMIA : EVXForm_1<1068, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhoumia $RT, $RA, $RB", IIC_VecFP>;
"evmhoumia $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUMIAAW : EVXForm_1<1292, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhoumiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhoumiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUMIANW : EVXForm_1<1420, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhoumianw $RT, $RA, $RB", IIC_VecFP>;
"evmhoumianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUSIAAW : EVXForm_1<1284, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhousiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmhousiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMHOUSIANW : EVXForm_1<1412, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmhousianw $RT, $RA, $RB", IIC_VecFP>;
"evmhousianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMRA : EVXForm_2<1220, (outs gprc:$RT), (ins gprc:$RA),
"evmra $RT, $RA", IIC_VecComplex>;
def EVMWHSMF : EVXForm_1<1103, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhsmf $RT, $RA, $RB", IIC_VecFP>;
"evmwhsmf $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHSMFA : EVXForm_1<1135, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhsmfa $RT, $RA, $RB", IIC_VecFP>;
"evmwhsmfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHSMI : EVXForm_1<1101, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhsmi $RT, $RA, $RB", IIC_VecFP>;
"evmwhsmi $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHSMIA : EVXForm_1<1133, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhsmia $RT, $RA, $RB", IIC_VecFP>;
"evmwhsmia $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHSSF : EVXForm_1<1095, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhssf $RT, $RA, $RB", IIC_VecFP>;
"evmwhssf $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHSSFA : EVXForm_1<1127, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhssfa $RT, $RA, $RB", IIC_VecFP>;
"evmwhssfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHUMI : EVXForm_1<1100, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhumi $RT, $RA, $RB", IIC_VecFP>;
"evmwhumi $RT, $RA, $RB", IIC_VecComplex>;
def EVMWHUMIA : EVXForm_1<1132, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwhumia $RT, $RA, $RB", IIC_VecFP>;
"evmwhumia $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLSMIAAW : EVXForm_1<1353, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlsmiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmwlsmiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLSMIANW : EVXForm_1<1481, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlsmianw $RT, $RA, $RB", IIC_VecFP>;
"evmwlsmianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLSSIAAW : EVXForm_1<1345, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlssiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmwlssiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLSSIANW : EVXForm_1<1473, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlssianw $RT, $RA, $RB", IIC_VecFP>;
"evmwlssianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUMI : EVXForm_1<1096, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlumi $RT, $RA, $RB", IIC_VecFP>;
"evmwlumi $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUMIA : EVXForm_1<1128, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlumia $RT, $RA, $RB", IIC_VecFP>;
"evmwlumia $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUMIAAW : EVXForm_1<1352, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlumiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmwlumiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUMIANW : EVXForm_1<1480, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlumianw $RT, $RA, $RB", IIC_VecFP>;
"evmwlumianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUSIAAW : EVXForm_1<1344, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlusiaaw $RT, $RA, $RB", IIC_VecFP>;
"evmwlusiaaw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWLUSIANW : EVXForm_1<1472, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwlusianw $RT, $RA, $RB", IIC_VecFP>;
"evmwlusianw $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMF : EVXForm_1<1115, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmf $RT, $RA, $RB", IIC_VecFP>;
"evmwsmf $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMFA : EVXForm_1<1147, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmfa $RT, $RA, $RB", IIC_VecFP>;
"evmwsmfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMFAA : EVXForm_1<1371, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmfaa $RT, $RA, $RB", IIC_VecFP>;
"evmwsmfaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMFAN : EVXForm_1<1499, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmfan $RT, $RA, $RB", IIC_VecFP>;
"evmwsmfan $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMI : EVXForm_1<1113, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmi $RT, $RA, $RB", IIC_VecFP>;
"evmwsmi $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMIA : EVXForm_1<1145, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmia $RT, $RA, $RB", IIC_VecFP>;
"evmwsmia $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMIAA : EVXForm_1<1369, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmiaa $RT, $RA, $RB", IIC_VecFP>;
"evmwsmiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSMIAN : EVXForm_1<1497, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwsmian $RT, $RA, $RB", IIC_VecFP>;
"evmwsmian $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSSF : EVXForm_1<1107, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwssf $RT, $RA, $RB", IIC_VecFP>;
"evmwssf $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSSFA : EVXForm_1<1139, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwssfa $RT, $RA, $RB", IIC_VecFP>;
"evmwssfa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSSFAA : EVXForm_1<1363, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwssfaa $RT, $RA, $RB", IIC_VecFP>;
"evmwssfaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWSSFAN : EVXForm_1<1491, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwssfan $RT, $RA, $RB", IIC_VecFP>;
"evmwssfan $RT, $RA, $RB", IIC_VecComplex>;
def EVMWUMI : EVXForm_1<1112, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwumi $RT, $RA, $RB", IIC_VecFP>;
"evmwumi $RT, $RA, $RB", IIC_VecComplex>;
def EVMWUMIA : EVXForm_1<1144, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwumia $RT, $RA, $RB", IIC_VecFP>;
"evmwumia $RT, $RA, $RB", IIC_VecComplex>;
def EVMWUMIAA : EVXForm_1<1368, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwumiaa $RT, $RA, $RB", IIC_VecFP>;
"evmwumiaa $RT, $RA, $RB", IIC_VecComplex>;
def EVMWUMIAN : EVXForm_1<1496, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evmwumian $RT, $RA, $RB", IIC_VecFP>;
"evmwumian $RT, $RA, $RB", IIC_VecComplex>;
def EVNAND : EVXForm_1<542, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evnand $RT, $RA, $RB", IIC_VecFP>;
"evnand $RT, $RA, $RB", IIC_VecGeneral>;
def EVNEG : EVXForm_2<521, (outs gprc:$RT), (ins gprc:$RA),
"evneg $RT, $RA", IIC_VecFP>;
"evneg $RT, $RA", IIC_VecGeneral>;
def EVNOR : EVXForm_1<536, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evnor $RT, $RA, $RB", IIC_VecFP>;
"evnor $RT, $RA, $RB", IIC_VecGeneral>;
def EVOR : EVXForm_1<535, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evor $RT, $RA, $RB", IIC_VecFP>;
"evor $RT, $RA, $RB", IIC_VecGeneral>;
def EVORC : EVXForm_1<539, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evorc $RT, $RA, $RB", IIC_VecFP>;
"evorc $RT, $RA, $RB", IIC_VecGeneral>;
def EVRLWI : EVXForm_1<554, (outs gprc:$RT), (ins gprc:$RA, u5imm:$RB),
"evrlwi $RT, $RA, $RB", IIC_VecFP>;
"evrlwi $RT, $RA, $RB", IIC_VecGeneral>;
def EVRLW : EVXForm_1<552, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evrlw $RT, $RA, $RB", IIC_VecFP>;
"evrlw $RT, $RA, $RB", IIC_VecGeneral>;
def EVRNDW : EVXForm_2<524, (outs gprc:$RT), (ins gprc:$RA),
"evrndw $RT, $RA", IIC_VecFP>;
"evrndw $RT, $RA", IIC_VecGeneral>;
def EVSEL : EVXForm_4<79, (outs gprc:$RT),
(ins gprc:$RA, gprc:$RB, crrc:$crD),
"evsel crD,$RT,$RA,$RB", IIC_VecGeneral>;
def EVSLWI : EVXForm_1<550, (outs gprc:$RT), (ins gprc:$RA, u5imm:$RB),
"evslwi $RT, $RA, $RB", IIC_VecFP>;
"evslwi $RT, $RA, $RB", IIC_VecGeneral>;
def EVSLW : EVXForm_1<548, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evslw $RT, $RA, $RB", IIC_VecFP>;
"evslw $RT, $RA, $RB", IIC_VecGeneral>;
def EVSPLATFI : EVXForm_2<555, (outs gprc:$RT), (ins i32imm:$RA),
"evsplatfi $RT, $RA", IIC_VecFP>;
def EVSPLATI : EVXForm_2<553, (outs gprc:$RT), (ins i32imm:$RA),
"evsplati $RT, $RA", IIC_VecFP>;
def EVSPLATFI : EVXForm_2<555, (outs gprc:$RT), (ins s5imm:$RA),
"evsplatfi $RT, $RA", IIC_VecGeneral>;
def EVSPLATI : EVXForm_2<553, (outs gprc:$RT), (ins s5imm:$RA),
"evsplati $RT, $RA", IIC_VecGeneral>;
def EVSRWIS : EVXForm_1<547, (outs gprc:$RT), (ins gprc:$RA, u5imm:$RB),
"evsrwis $RT, $RA, $RB", IIC_VecFP>;
"evsrwis $RT, $RA, $RB", IIC_VecGeneral>;
def EVSRWIU : EVXForm_1<546, (outs gprc:$RT), (ins gprc:$RA, u5imm:$RB),
"evsrwiu $RT, $RA, $RB", IIC_VecFP>;
"evsrwiu $RT, $RA, $RB", IIC_VecGeneral>;
def EVSRWS : EVXForm_1<545, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evsrws $RT, $RA, $RB", IIC_VecFP>;
"evsrws $RT, $RA, $RB", IIC_VecGeneral>;
def EVSRWU : EVXForm_1<544, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evsrwu $RT, $RA, $RB", IIC_VecFP>;
"evsrwu $RT, $RA, $RB", IIC_VecGeneral>;
def EVSTDDX : EVXForm_1<800, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstddx $RT, $RA, $RB", IIC_VecFP>;
def EVSTDHX : EVXForm_1<804, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstdhx $RT, $RA, $RB", IIC_VecFP>;
def EVSTDWX : EVXForm_1<802, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstdwx $RT, $RA, $RB", IIC_VecFP>;
def EVSTWHEX : EVXForm_1<816, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstwhex $RT, $RA, $RB", IIC_VecFP>;
def EVSTWHOX : EVXForm_1<820, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstwhox $RT, $RA, $RB", IIC_VecFP>;
def EVSTWWEX : EVXForm_1<824, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstwwex $RT, $RA, $RB", IIC_VecFP>;
def EVSTWWOX : EVXForm_1<828, (outs), (ins gprc:$RT, gprc:$RA, gprc:$RB),
"evstwwox $RT, $RA, $RB", IIC_VecFP>;
def EVSTDD : EVXForm_D<801, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdd $RT, $dst", IIC_LdStStore>;
def EVSTDDX : EVXForm_1<800, (outs), (ins gprc:$RT, memrr:$dst),
"evstddx $RT, $dst", IIC_LdStStore>;
def EVSTDH : EVXForm_D<805, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdh $RT, $dst", IIC_LdStStore>;
def EVSTDHX : EVXForm_1<804, (outs), (ins gprc:$RT, memrr:$dst),
"evstdhx $RT, $dst", IIC_LdStStore>;
def EVSTDW : EVXForm_D<803, (outs), (ins gprc:$RT, spe8dis:$dst),
"evstdw $RT, $dst", IIC_LdStStore>;
def EVSTDWX : EVXForm_1<802, (outs), (ins gprc:$RT, memrr:$dst),
"evstdwx $RT, $dst", IIC_LdStStore>;
def EVSTWHE : EVXForm_D<817, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwhe $RT, $dst", IIC_LdStStore>;
def EVSTWHEX : EVXForm_1<816, (outs), (ins gprc:$RT, memrr:$dst),
"evstwhex $RT, $dst", IIC_LdStStore>;
def EVSTWHO : EVXForm_D<821, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwho $RT, $dst", IIC_LdStStore>;
def EVSTWHOX : EVXForm_1<820, (outs), (ins gprc:$RT, memrr:$dst),
"evstwhox $RT, $dst", IIC_LdStStore>;
def EVSTWWE : EVXForm_D<825, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwwe $RT, $dst", IIC_LdStStore>;
def EVSTWWEX : EVXForm_1<824, (outs), (ins gprc:$RT, memrr:$dst),
"evstwwex $RT, $dst", IIC_LdStStore>;
def EVSTWWO : EVXForm_D<829, (outs), (ins gprc:$RT, spe4dis:$dst),
"evstwwo $RT, $dst", IIC_LdStStore>;
def EVSTWWOX : EVXForm_1<828, (outs), (ins gprc:$RT, memrr:$dst),
"evstwwox $RT, $dst", IIC_LdStStore>;
def EVSUBFSSIAAW : EVXForm_2<1219, (outs gprc:$RT), (ins gprc:$RA),
"evsubfssiaaw $RT, $RA", IIC_VecFP>;
"evsubfssiaaw $RT, $RA", IIC_VecComplex>;
def EVSUBFSMIAAW : EVXForm_2<1227, (outs gprc:$RT), (ins gprc:$RA),
"evsubfsmiaaw $RT, $RA", IIC_VecFP>;
"evsubfsmiaaw $RT, $RA", IIC_VecComplex>;
def EVSUBFUMIAAW : EVXForm_2<1226, (outs gprc:$RT), (ins gprc:$RA),
"evsubfumiaaw $RT, $RA", IIC_VecFP>;
"evsubfumiaaw $RT, $RA", IIC_VecComplex>;
def EVSUBFUSIAAW : EVXForm_2<1218, (outs gprc:$RT), (ins gprc:$RA),
"evsubfusiaaw $RT, $RA", IIC_VecFP>;
"evsubfusiaaw $RT, $RA", IIC_VecComplex>;
def EVSUBFW : EVXForm_1<516, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evsubfw $RT, $RA, $RB", IIC_VecFP>;
"evsubfw $RT, $RA, $RB", IIC_VecGeneral>;
def EVSUBIFW : EVXForm_1<518, (outs gprc:$RT), (ins u5imm:$RA, gprc:$RB),
"evsubifw $RT, $RA, $RB", IIC_VecFP>;
"evsubifw $RT, $RA, $RB", IIC_VecGeneral>;
def EVXOR : EVXForm_1<534, (outs gprc:$RT), (ins gprc:$RA, gprc:$RB),
"evxor $RT, $RA, $RB", IIC_VecFP>;
"evxor $RT, $RA, $RB", IIC_VecGeneral>;
} // HasSPE

2
llvm/lib/Target/PowerPC/PPCSchedule.td
View File

@ -87,6 +87,8 @@ def IIC_SprMTSRIN : InstrItinClass;
def IIC_SprRFI : InstrItinClass;
def IIC_SprSC : InstrItinClass;
def IIC_FPGeneral : InstrItinClass;
def IIC_FPDGeneral : InstrItinClass;
def IIC_FPSGeneral : InstrItinClass;
def IIC_FPAddSub : InstrItinClass;
def IIC_FPCompare : InstrItinClass;
def IIC_FPDivD : InstrItinClass;

8
llvm/lib/Target/PowerPC/PPCScheduleE500.td
View File

@ -233,6 +233,14 @@ def PPCE500Itineraries : ProcessorItineraries<
InstrStage<1, [E500_SU0]>],
[4, 1],
[NoBypass, E500_GPR_Bypass]>,
InstrItinData<IIC_FPDGeneral, [InstrStage<1, [E500_DIS0, E500_DIS1], 0>,
InstrStage<6, [E500_MU]>],
[9, 1, 1], // Latency = 6, Repeat rate = 1
[NoBypass]>,
InstrItinData<IIC_FPSGeneral, [InstrStage<1, [E500_DIS0, E500_DIS1], 0>,
InstrStage<4, [E500_MU]>],
[7, 1, 1], // Latency = 4, Repeat rate = 1
[NoBypass]>,
InstrItinData<IIC_FPDivD, [InstrStage<1, [E500_DIS0, E500_DIS1], 0>,
InstrStage<32, [E500_MU]>],
[35, 1, 1], // Latency = 32, Repeat rate = 32

5
llvm/lib/Target/PowerPC/PPCScheduleP9.td
View File

@ -35,8 +35,9 @@ def P9Model : SchedMachineModel {
let CompleteModel = 1;
// Do not support QPX (Quad Processing eXtension) on Power 9.
let UnsupportedFeatures = [HasQPX];
// Do not support QPX (Quad Processing eXtension) or SPE (Signal Procesing
// Engine) on Power 9.
let UnsupportedFeatures = [HasQPX, HasSPE];
}

515
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-e500.txt
View File

@ -1,7 +1,518 @@
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=pwr7 | FileCheck %s
# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-unknown -mcpu=e500 -mattr=+spe | FileCheck %s
# CHECK: rfdi
0x4c 0x00 0x00 0x4e
# CHECK: rfmci
0x4c 0x00 0x00 0x4c
# CHECK: evlddx 14, 21, 28
0x11 0xd5 0xe3 0x00
# CHECK: evldwx 14, 21, 28
0x11 0xd5 0xe3 0x02
# CHECK: evldhx 14, 21, 28
0x11 0xd5 0xe3 0x04
# CHECK: evlhhesplatx 14, 21, 28
0x11 0xd5 0xe3 0x08
# CHECK: evlhhousplatx 14, 21, 28
0x11 0xd5 0xe3 0x0c
# CHECK: evlhhossplatx 14, 21, 28
0x11 0xd5 0xe3 0x0e
# CHECK: evlwhex 14, 21, 28
0x11 0xd5 0xe3 0x10
# CHECK: evlwhoux 14, 21, 28
0x11 0xd5 0xe3 0x14
# CHECK: evlwhosx 14, 21, 28
0x11 0xd5 0xe3 0x16
# CHECK: evlwwsplatx 14, 21, 28
0x11 0xd5 0xe3 0x18
# CHECK: evlwhsplatx 14, 21, 28
0x11 0xd5 0xe3 0x1c
# CHECK: evmergehi 14, 21, 28
0x11 0xd5 0xe2 0x2c
# CHECK: evmergelo 14, 21, 28
0x11 0xd5 0xe2 0x2d
# CHECK: evmergehilo 14, 21, 28
0x11 0xd5 0xe2 0x2e
# CHECK: evmergelohi 14, 21, 28
0x11 0xd5 0xe2 0x2f
# CHECK: brinc 14, 22, 19
0x11 0xd6 0x9a 0x0f
# CHECK: evabs 14, 22
0x11 0xd6 0x02 0x08
# CHECK: evaddsmiaaw 14, 22
0x11 0xd6 0x04 0xc9
# CHECK: evaddssiaaw 14, 22
0x11 0xd6 0x04 0xc1
# CHECK: evaddusiaaw 14, 22
0x11 0xd6 0x04 0xc0
# CHECK: evaddumiaaw 14, 22
0x11 0xd6 0x04 0xc8
# CHECK: evaddw 14, 22, 19
0x11 0xd6 0x9a 0x00
# CHECK: evaddiw 14, 29, 19
0x11 0xd3 0xea 0x02
# CHECK: evand 14, 22, 19
0x11 0xd6 0x9a 0x11
# CHECK: evandc 14, 22, 19
0x11 0xd6 0x9a 0x12
# CHECK: evcmpeq 3, 22, 19
0x11 0x96 0x9a 0x34
# CHECK: evcmpgts 3, 22, 19
0x11 0x96 0x9a 0x31
# CHECK: evcmpgtu 3, 22, 19
0x11 0x96 0x9a 0x30
# CHECK: evcmplts 3, 22, 19
0x11 0x96 0x9a 0x33
# CHECK: evcmpltu 3, 22, 19
0x11 0x96 0x9a 0x32
# CHECK: evcntlsw 14, 22
0x11 0xd6 0x02 0x0e
# CHECK: evcntlzw 14, 22
0x11 0xd6 0x02 0x0d
# CHECK: evdivws 14, 22, 19
0x11 0xd6 0x9c 0xc6
# CHECK: evdivwu 14, 22, 19
0x11 0xd6 0x9c 0xc7
# CHECK: eveqv 14, 22, 19
0x11 0xd6 0x9a 0x19
# CHECK: evextsb 14, 22
0x11 0xd6 0x02 0x0a
# CHECK: evextsh 14, 22
0x11 0xd6 0x02 0x0b
# CHECK: evmhegsmfaa 14, 22, 19
0x11 0xd6 0x9d 0x2b
# CHECK: evmhegsmfan 14, 22, 19
0x11 0xd6 0x9d 0xab
# CHECK: evmhegsmiaa 14, 22, 19
0x11 0xd6 0x9d 0x29
# CHECK: evmhegsmian 14, 22, 19
0x11 0xd6 0x9d 0xa9
# CHECK: evmhegumiaa 14, 22, 19
0x11 0xd6 0x9d 0x28
# CHECK: evmhegumian 14, 22, 19
0x11 0xd6 0x9d 0xa8
# CHECK: evmhesmf 14, 22, 19
0x11 0xd6 0x9c 0x0b
# CHECK: evmhesmfa 14, 22, 19
0x11 0xd6 0x9c 0x2b
# CHECK: evmhesmfaaw 14, 22, 19
0x11 0xd6 0x9d 0x0b
# CHECK: evmhesmfanw 14, 22, 19
0x11 0xd6 0x9d 0x8b
# CHECK: evmhesmi 14, 22, 19
0x11 0xd6 0x9c 0x09
# CHECK: evmhesmia 14, 22, 19
0x11 0xd6 0x9c 0x29
# CHECK: evmhesmiaaw 14, 22, 19
0x11 0xd6 0x9d 0x09
# CHECK: evmhesmianw 14, 22, 19
0x11 0xd6 0x9d 0x89
# CHECK: evmhessf 14, 22, 19
0x11 0xd6 0x9c 0x03
# CHECK: evmhessfa 14, 22, 19
0x11 0xd6 0x9c 0x23
# CHECK: evmhessfaaw 14, 22, 19
0x11 0xd6 0x9d 0x03
# CHECK: evmhessfanw 14, 22, 19
0x11 0xd6 0x9d 0x83
# CHECK: evmhessiaaw 14, 22, 19
0x11 0xd6 0x9d 0x01
# CHECK: evmhessianw 14, 22, 19
0x11 0xd6 0x9d 0x81
# CHECK: evmheumi 14, 22, 19
0x11 0xd6 0x9c 0x08
# CHECK: evmheumia 14, 22, 19
0x11 0xd6 0x9c 0x28
# CHECK: evmheumiaaw 14, 22, 19
0x11 0xd6 0x9d 0x08
# CHECK: evmheumianw 14, 22, 19
0x11 0xd6 0x9d 0x88
# CHECK: evmheusiaaw 14, 22, 19
0x11 0xd6 0x9d 0x00
# CHECK: evmheusianw 14, 22, 19
0x11 0xd6 0x9d 0x80
# CHECK: evmhogsmfaa 14, 22, 19
0x11 0xd6 0x9d 0x2f
# CHECK: evmhogsmfan 14, 22, 19
0x11 0xd6 0x9d 0xaf
# CHECK: evmhogsmiaa 14, 22, 19
0x11 0xd6 0x9d 0x2d
# CHECK: evmhogsmian 14, 22, 19
0x11 0xd6 0x9d 0xad
# CHECK: evmhogumiaa 14, 22, 19
0x11 0xd6 0x9d 0x2c
# CHECK: evmhogumian 14, 22, 19
0x11 0xd6 0x9d 0xac
# CHECK: evmhosmf 14, 22, 19
0x11 0xd6 0x9c 0x0f
# CHECK: evmhosmfa 14, 22, 19
0x11 0xd6 0x9c 0x2f
# CHECK: evmhosmfaaw 14, 22, 19
0x11 0xd6 0x9d 0x0f
# CHECK: evmhosmfanw 14, 22, 19
0x11 0xd6 0x9d 0x8f
# CHECK: evmhosmi 14, 22, 19
0x11 0xd6 0x9c 0x0d
# CHECK: evmhosmia 14, 22, 19
0x11 0xd6 0x9c 0x2d
# CHECK: evmhosmiaaw 14, 22, 19
0x11 0xd6 0x9d 0x0d
# CHECK: evmhosmianw 14, 22, 19
0x11 0xd6 0x9d 0x8d
# CHECK: evmhossf 14, 22, 19
0x11 0xd6 0x9c 0x07
# CHECK: evmhossfa 14, 22, 19
0x11 0xd6 0x9c 0x27
# CHECK: evmhossfaaw 14, 22, 19
0x11 0xd6 0x9d 0x07
# CHECK: evmhossfanw 14, 22, 19
0x11 0xd6 0x9d 0x87
# CHECK: evmhossiaaw 14, 22, 19
0x11 0xd6 0x9d 0x05
# CHECK: evmhossianw 14, 22, 19
0x11 0xd6 0x9d 0x85
# CHECK: evmhoumi 14, 22, 19
0x11 0xd6 0x9c 0x0c
# CHECK: evmhoumia 14, 22, 19
0x11 0xd6 0x9c 0x2c
# CHECK: evmhoumiaaw 14, 22, 19
0x11 0xd6 0x9d 0x0c
# CHECK: evmhoumianw 14, 22, 19
0x11 0xd6 0x9d 0x8c
# CHECK: evmhousiaaw 14, 22, 19
0x11 0xd6 0x9d 0x04
# CHECK: evmhousianw 14, 22, 19
0x11 0xd6 0x9d 0x84
# CHECK: evmwhsmf 14, 22, 19
0x11 0xd6 0x9c 0x4f
# CHECK: evmwhsmfa 14, 22, 19
0x11 0xd6 0x9c 0x6f
# CHECK: evmwhsmi 14, 22, 19
0x11 0xd6 0x9c 0x4d
# CHECK: evmwhsmia 14, 22, 19
0x11 0xd6 0x9c 0x6d
# CHECK: evmwhssf 14, 22, 19
0x11 0xd6 0x9c 0x47
# CHECK: evmwhssfa 14, 22, 19
0x11 0xd6 0x9c 0x67
# CHECK: evmwhumi 14, 22, 19
0x11 0xd6 0x9c 0x4c
# CHECK: evmwhumia 14, 22, 19
0x11 0xd6 0x9c 0x6c
# CHECK: evmwlsmiaaw 14, 22, 19
0x11 0xd6 0x9d 0x49
# CHECK: evmwlsmianw 14, 22, 19
0x11 0xd6 0x9d 0xc9
# CHECK: evmwlssiaaw 14, 22, 19
0x11 0xd6 0x9d 0x41
# CHECK: evmwlssianw 14, 22, 19
0x11 0xd6 0x9d 0xc1
# CHECK: evmwlumi 14, 22, 19
0x11 0xd6 0x9c 0x48
# CHECK: evmwlumia 14, 22, 19
0x11 0xd6 0x9c 0x68
# CHECK: evmwlumiaaw 14, 22, 19
0x11 0xd6 0x9d 0x48
# CHECK: evmwlumianw 14, 22, 19
0x11 0xd6 0x9d 0xc8
# CHECK: evmwlusiaaw 14, 22, 19
0x11 0xd6 0x9d 0x40
# CHECK: evmwlusianw 14, 22, 19
0x11 0xd6 0x9d 0xc0
# CHECK: evmwsmf 14, 22, 19
0x11 0xd6 0x9c 0x5b
# CHECK: evmwsmfa 14, 22, 19
0x11 0xd6 0x9c 0x7b
# CHECK: evmwsmfaa 14, 22, 19
0x11 0xd6 0x9d 0x5b
# CHECK: evmwsmfan 14, 22, 19
0x11 0xd6 0x9d 0xdb
# CHECK: evmwsmi 14, 22, 19
0x11 0xd6 0x9c 0x59
# CHECK: evmwsmia 14, 22, 19
0x11 0xd6 0x9c 0x79
# CHECK: evmwsmiaa 14, 22, 19
0x11 0xd6 0x9d 0x59
# CHECK: evmwsmian 14, 22, 19
0x11 0xd6 0x9d 0xd9
# CHECK: evmwssf 14, 22, 19
0x11 0xd6 0x9c 0x53
# CHECK: evmwssfa 14, 22, 19
0x11 0xd6 0x9c 0x73
# CHECK: evmwssfaa 14, 22, 19
0x11 0xd6 0x9d 0x53
# CHECK: evmwssfan 14, 22, 19
0x11 0xd6 0x9d 0xd3
# CHECK: evmwumi 14, 22, 19
0x11 0xd6 0x9c 0x58
# CHECK: evmwumia 14, 22, 19
0x11 0xd6 0x9c 0x78
# CHECK: evmwumiaa 14, 22, 19
0x11 0xd6 0x9d 0x58
# CHECK: evmwumian 14, 22, 19
0x11 0xd6 0x9d 0xd8
# CHECK: evnand 14, 22, 19
0x11 0xd6 0x9a 0x1e
# CHECK: evneg 14, 22
0x11 0xd6 0x02 0x09
# CHECK: evnor 14, 22, 19
0x11 0xd6 0x9a 0x18
# CHECK: evor 14, 22, 19
0x11 0xd6 0x9a 0x17
# CHECK: evorc 14, 22, 19
0x11 0xd6 0x9a 0x1b
# CHECK: evrlwi 14, 29, 19
0x11 0xdd 0x9a 0x2a
# CHECK: evrlw 14, 22, 19
0x11 0xd6 0x9a 0x28
# CHECK: evrndw 14, 22
0x11 0xd6 0x02 0x0c
# CHECK: evslwi 14, 29, 19
0x11 0xdd 0x9a 0x26
# CHECK: evslw 14, 22, 19
0x11 0xd6 0x9a 0x24
# CHECK: evsplatfi 14, -13
0x11 0xd3 0x02 0x2b
# CHECK: evsplati 14, -13
0x11 0xd3 0x02 0x29
# CHECK: evsrwis 14, 29, 19
0x11 0xdd 0x9a 0x23
# CHECK: evsrwiu 14, 29, 19
0x11 0xdd 0x9a 0x22
# CHECK: evsrws 14, 22, 19
0x11 0xd6 0x9a 0x21
# CHECK: evsrwu 14, 22, 19
0x11 0xd6 0x9a 0x20
# CHECK: evstddx 14, 22, 19
0x11 0xd6 0x9b 0x20
# CHECK: evstdhx 14, 22, 19
0x11 0xd6 0x9b 0x24
# CHECK: evstdwx 14, 22, 19
0x11 0xd6 0x9b 0x22
# CHECK: evstwhex 14, 22, 19
0x11 0xd6 0x9b 0x30
# CHECK: evstwhox 14, 22, 19
0x11 0xd6 0x9b 0x34
# CHECK: evstwwex 14, 22, 19
0x11 0xd6 0x9b 0x38
# CHECK: evstwwox 14, 22, 19
0x11 0xd6 0x9b 0x3c
# CHECK: evsubfssiaaw 14, 22
0x11 0xd6 0x04 0xc3
# CHECK: evsubfsmiaaw 14, 22
0x11 0xd6 0x04 0xcb
# CHECK: evsubfumiaaw 14, 22
0x11 0xd6 0x04 0xca
# CHECK: evsubfusiaaw 14, 22
0x11 0xd6 0x04 0xc2
# CHECK: evsubfw 14, 22, 19
0x11 0xd6 0x9a 0x04
# CHECK: evsubifw 14, 29, 19
0x11 0xdd 0x9a 0x06
# CHECK: evxor 14, 22, 19
0x11 0xd6 0x9a 0x16
# CHECK: evldd 14, 0(27)
0x11 0xdb 0x03 0x01
# CHECK: evldd 14, 248(27)
0x11 0xdb 0xfb 0x01
# CHECK: evldd 14, 248(9)
0x11 0xc9 0xfb 0x01
# CHECK: evldw 14, 0(27)
0x11 0xdb 0x03 0x03
# CHECK: evldw 14, 248(27)
0x11 0xdb 0xfb 0x03
# CHECK: evldw 14, 248(9)
0x11 0xc9 0xfb 0x03
# CHECK: evldh 14, 0(27)
0x11 0xdb 0x03 0x05
# CHECK: evldh 14, 248(27)
0x11 0xdb 0xfb 0x05
# CHECK: evldh 14, 248(9)
0x11 0xc9 0xfb 0x05
# CHECK: evlhhesplat 14, 0(27)
0x11 0xdb 0x03 0x09
# CHECK: evlhhousplat 14, 0(27)
0x11 0xdb 0x03 0x0d
# CHECK: evlhhousplat 14, 62(27)
0x11 0xdb 0xfb 0x0d
# CHECK: evlhhousplat 14, 62(9)
0x11 0xc9 0xfb 0x0d
# CHECK: evlhhossplat 14, 0(27)
0x11 0xdb 0x03 0x0f
# CHECK: evlhhossplat 14, 62(27)
0x11 0xdb 0xfb 0x0f
# CHECK: evlhhossplat 14, 62(9)
0x11 0xc9 0xfb 0x0f
# CHECK: evlwhe 14, 0(27)
0x11 0xdb 0x03 0x11
# CHECK: evlwhe 14, 124(27)
0x11 0xdb 0xfb 0x11
# CHECK: evlwhe 14, 124(9)
0x11 0xc9 0xfb 0x11
# CHECK: evlwhou 14, 0(27)
0x11 0xdb 0x03 0x15
# CHECK: evlwhou 14, 124(27)
0x11 0xdb 0xfb 0x15
# CHECK: evlwhou 14, 124(9)
0x11 0xc9 0xfb 0x15
# CHECK: evlwhos 14, 0(27)
0x11 0xdb 0x03 0x17
# CHECK: evlwhos 14, 124(27)
0x11 0xdb 0xfb 0x17
# CHECK: evlwhos 14, 124(9)
0x11 0xc9 0xfb 0x17
# CHECK: evlwwsplat 14, 0(27)
0x11 0xdb 0x03 0x19
# CHECK: evlwwsplat 14, 124(27)
0x11 0xdb 0xfb 0x19
# CHECK: evlwwsplat 14, 124(9)
0x11 0xc9 0xfb 0x19
# CHECK: evlwhsplat 14, 0(27)
0x11 0xdb 0x03 0x1d
# CHECK: evlwhsplat 14, 124(27)
0x11 0xdb 0xfb 0x1d
# CHECK: evlwhsplat 14, 124(9)
0x11 0xc9 0xfb 0x1d
# CHECK: evstdd 14, 0(27)
0x11 0xdb 0x03 0x21
# CHECK: evstdd 14, 248(27)
0x11 0xdb 0xfb 0x21
# CHECK: evstdd 14, 248(9)
0x11 0xc9 0xfb 0x21
# CHECK: evstdh 14, 0(27)
0x11 0xdb 0x03 0x25
# CHECK: evstdh 14, 248(27)
0x11 0xdb 0xfb 0x25
# CHECK: evstdh 14, 248(9)
0x11 0xc9 0xfb 0x25
# CHECK: evstdw 14, 0(27)
0x11 0xdb 0x03 0x23
# CHECK: evstdw 14, 248(27)
0x11 0xdb 0xfb 0x23
# CHECK: evstdw 14, 248(9)
0x11 0xc9 0xfb 0x23
# CHECK: evstwhe 14, 0(27)
0x11 0xdb 0x03 0x31
# CHECK: evstwhe 14, 124(27)
0x11 0xdb 0xfb 0x31
# CHECK: evstwhe 14, 124(9)
0x11 0xc9 0xfb 0x31
# CHECK: evstwho 14, 0(27)
0x11 0xdb 0x03 0x35
# CHECK: evstwho 14, 124(27)
0x11 0xdb 0xfb 0x35
# CHECK: evstwho 14, 124(9)
0x11 0xc9 0xfb 0x35
# CHECK: evstwwe 14, 0(27)
0x11 0xdb 0x03 0x39
# CHECK: evstwwe 14, 124(27)
0x11 0xdb 0xfb 0x39
# CHECK: evstwwe 14, 124(9)
0x11 0xc9 0xfb 0x39
# CHECK: evstwwo 14, 0(27)
0x11 0xdb 0x03 0x3d
# CHECK: evstwwo 14, 124(27)
0x11 0xdb 0xfb 0x3d
# CHECK: evstwwo 14, 124(9)
0x11 0xc9 0xfb 0x3d
# CHECK: efdabs 3, 4
0x10 0x64 0x02 0xe4
# CHECK: efdadd 3, 4, 5
0x10 0x64 0x2a 0xe0
# CHECK: efdcfs 3, 4
0x10 0x60 0x22 0xef
# CHECK: efdcfsf 5, 6
0x10 0xa0 0x32 0xf3
# CHECK: efdcfsi 5, 6
0x10 0xa0 0x32 0xf1
# CHECK: efdcfsid 10, 14
0x11 0x40 0x72 0xe3
# CHECK: efdcfuf 5, 8
0x10 0xa0 0x42 0xf2
# CHECK: efdcfui 6, 9
0x10 0xc0 0x4a 0xf0
# CHECK: efdcfuid 7, 10
0x10 0xe0 0x52 0xe2
# CHECK: efdcmpeq 3, 3, 8
0x11 0x83 0x42 0xee
# CHECK: efdcmpgt 4, 7, 3
0x12 0x07 0x1a 0xec
# CHECK: efdcmplt 2, 3, 4
0x11 0x03 0x22 0xed
# CHECK: efdctsf 5, 3
0x10 0xa0 0x1a 0xf7
# CHECK: efdctsi 6, 4
0x10 0xc0 0x22 0xf5
# CHECK: efdctsidz 3, 4
0x10 0x60 0x22 0xeb
# CHECK: efdctsiz 3, 4
0x10 0x60 0x22 0xfa
# CHECK: efdctuf 5, 8
0x10 0xa0 0x42 0xf6
# CHECK: efdctui 9, 10
0x11 0x20 0x52 0xf4
# CHECK: efdctuidz 3, 8
0x10 0x60 0x42 0xea
# CHECK: efdctuiz 5, 17
0x10 0xa0 0x8a 0xf8
# CHECK: efddiv 3, 4, 5
0x10 0x64 0x2a 0xe9
# CHECK: efdmul 0, 3, 8
0x10 0x03 0x42 0xe8
# CHECK: efdnabs 3, 23
0x10 0x77 0x02 0xe5
# CHECK: efdneg 3, 22
0x10 0x76 0x02 0xe6
# CHECK: efdsub 3, 4, 6
0x10 0x64 0x32 0xe1
# CHECK: efdtsteq 3, 4, 5
0x11 0x84 0x2a 0xfe
# CHECK: efdtstgt 3, 3, 6
0x11 0x83 0x32 0xfc
# CHECK: efdtstlt 4, 0, 3
0x12 0x00 0x1a 0xfd
# CHECK: efsabs 3, 4
0x10 0x64 0x02 0xc4
# CHECK: efsadd 3, 4, 5
0x10 0x64 0x2a 0xc0
# CHECK: efscfsf 5, 6
0x10 0xa0 0x32 0xd3
# CHECK: efscfsi 5, 6
0x10 0xa0 0x32 0xd1
# CHECK: efscfuf 5, 8
0x10 0xa0 0x42 0xd2
# CHECK: efscfui 6, 9
0x10 0xc0 0x4a 0xd0
# CHECK: efscmpeq 3, 3, 8
0x11 0x83 0x42 0xce
# CHECK: efscmpgt 4, 7, 3
0x12 0x07 0x1a 0xcc
# CHECK: efscmplt 2, 3, 4
0x11 0x03 0x22 0xcd
# CHECK: efsctsf 5, 3
0x10 0xa0 0x1a 0xd7
# CHECK: efsctsi 6, 4
0x10 0xc0 0x22 0xd5
# CHECK: efsctsiz 3, 4
0x10 0x60 0x22 0xda
# CHECK: efsctuf 5, 8
0x10 0xa0 0x42 0xd6
# CHECK: efsctui 9, 10
0x11 0x20 0x52 0xd4
# CHECK: efsctuiz 5, 17
0x10 0xa0 0x8a 0xd8
# CHECK: efsdiv 3, 4, 5
0x10 0x64 0x2a 0xc9
# CHECK: efsmul 0, 3, 8
0x10 0x03 0x42 0xc8
# CHECK: efsnabs 3, 23
0x10 0x77 0x02 0xc5
# CHECK: efsneg 3, 22
0x10 0x76 0x02 0xc6
# CHECK: efssub 3, 4, 6
0x10 0x64 0x32 0xc1
# CHECK: efststeq 3, 4, 5
0x11 0x84 0x2a 0xde
# CHECK: efststgt 3, 3, 6
0x11 0x83 0x32 0xdc
# CHECK: efststlt 4, 0, 3
0x12 0x00 0x1a 0xdd

160
llvm/test/MC/PowerPC/ppc64-encoding-spe.s
View File

@ -70,9 +70,9 @@
# CHECK-BE: evaddw 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x00]
# CHECK-LE: evaddw 14, 22, 19 # encoding: [0x00,0x9a,0xd6,0x11]
evaddw %r14, %r22, %r19
# CHECK-BE: evaddiw 14, 29, 19 # encoding: [0x11,0xd3,0xea,0x02]
# CHECK-LE: evaddiw 14, 29, 19 # encoding: [0x02,0xea,0xd3,0x11]
evaddiw %r14, 29, %r19
# CHECK-BE: evaddiw 14, 22, 19 # encoding: [0x11,0xd3,0xb2,0x02]
# CHECK-LE: evaddiw 14, 22, 19 # encoding: [0x02,0xb2,0xd3,0x11]
evaddiw %r14, %r22, 19
# CHECK-BE: evand 14, 22, 19 # encoding: [0x11,0xd6,0x9a,0x11]
# CHECK-LE: evand 14, 22, 19 # encoding: [0x11,0x9a,0xd6,0x11]
evand %r14, %r22, %r19
@ -620,3 +620,157 @@
# CHECK-BE: evstwwo 14, 124(9) # encoding: [0x11,0xc9,0xfb,0x3d]
# CHECK-LE: evstwwo 14, 124(9) # encoding: [0x3d,0xfb,0xc9,0x11]
evstwwo %r14, 124(%r9)
# CHECK-BE: efdabs 3, 4 # encoding: [0x10,0x64,0x02,0xe4]
# CHECK-LE: efdabs 3, 4 # encoding: [0xe4,0x02,0x64,0x10]
efdabs %r3, %r4
# CHECK-BE: efdadd 3, 4, 5 # encoding: [0x10,0x64,0x2a,0xe0]
# CHECK-LE: efdadd 3, 4, 5 # encoding: [0xe0,0x2a,0x64,0x10]
efdadd %r3, %r4, %r5
# CHECK-BE: efdcfs 3, 4 # encoding: [0x10,0x60,0x22,0xef]
# CHECK-LE: efdcfs 3, 4 # encoding: [0xef,0x22,0x60,0x10]
efdcfs %r3, %r4
# CHECK-BE: efdcfsf 5, 6 # encoding: [0x10,0xa0,0x32,0xf3]
# CHECK-LE: efdcfsf 5, 6 # encoding: [0xf3,0x32,0xa0,0x10]
efdcfsf %r5, %r6
# CHECK-BE: efdcfsi 5, 6 # encoding: [0x10,0xa0,0x32,0xf1]
# CHECK-LE: efdcfsi 5, 6 # encoding: [0xf1,0x32,0xa0,0x10]
efdcfsi %r5, %r6
# CHECK-BE: efdcfsid 10, 14 # encoding: [0x11,0x40,0x72,0xe3]
# CHECK-LE: efdcfsid 10, 14 # encoding: [0xe3,0x72,0x40,0x11]
efdcfsid %r10, %r14
# CHECK-BE: efdcfuf 5, 8 # encoding: [0x10,0xa0,0x42,0xf2]
# CHECK-LE: efdcfuf 5, 8 # encoding: [0xf2,0x42,0xa0,0x10]
efdcfuf %r5, %r8
# CHECK-BE: efdcfui 6, 9 # encoding: [0x10,0xc0,0x4a,0xf0]
# CHECK-LE: efdcfui 6, 9 # encoding: [0xf0,0x4a,0xc0,0x10]
efdcfui %r6, %r9
# CHECK-BE: efdcfuid 7, 10 # encoding: [0x10,0xe0,0x52,0xe2]
# CHECK-LE: efdcfuid 7, 10 # encoding: [0xe2,0x52,0xe0,0x10]
efdcfuid %r7, %r10
# CHECK-BE: efdcmpeq 3, 3, 8 # encoding: [0x11,0x83,0x42,0xee]
# CHECK-LE: efdcmpeq 3, 3, 8 # encoding: [0xee,0x42,0x83,0x11]
efdcmpeq %cr3, %r3, %r8
# CHECK-BE: efdcmpgt 4, 7, 3 # encoding: [0x12,0x07,0x1a,0xec]
# CHECK-LE: efdcmpgt 4, 7, 3 # encoding: [0xec,0x1a,0x07,0x12]
efdcmpgt %cr4, %r7, %r3
# CHECK-BE: efdcmplt 2, 3, 4 # encoding: [0x11,0x03,0x22,0xed]
# CHECK-LE: efdcmplt 2, 3, 4 # encoding: [0xed,0x22,0x03,0x11]
efdcmplt %cr2, %r3, %r4
# CHECK-BE: efdctsf 5, 3 # encoding: [0x10,0xa0,0x1a,0xf7]
# CHECK-LE: efdctsf 5, 3 # encoding: [0xf7,0x1a,0xa0,0x10]
efdctsf %r5, %r3
# CHECK-BE: efdctsi 6, 4 # encoding: [0x10,0xc0,0x22,0xf5]
# CHECK-LE: efdctsi 6, 4 # encoding: [0xf5,0x22,0xc0,0x10]
efdctsi %r6, %r4
# CHECK-BE: efdctsidz 3, 4 # encoding: [0x10,0x60,0x22,0xeb]
# CHECK-LE: efdctsidz 3, 4 # encoding: [0xeb,0x22,0x60,0x10]
efdctsidz %r3, %r4
# CHECK-BE: efdctsiz 3, 4 # encoding: [0x10,0x60,0x22,0xfa]
# CHECK-LE: efdctsiz 3, 4 # encoding: [0xfa,0x22,0x60,0x10]
efdctsiz %r3, %r4
# CHECK-BE: efdctuf 5, 8 # encoding: [0x10,0xa0,0x42,0xf6]
# CHECK-LE: efdctuf 5, 8 # encoding: [0xf6,0x42,0xa0,0x10]
efdctuf %r5, %r8
# CHECK-BE: efdctui 9, 10 # encoding: [0x11,0x20,0x52,0xf4]
# CHECK-LE: efdctui 9, 10 # encoding: [0xf4,0x52,0x20,0x11]
efdctui %r9, %r10
# CHECK-BE: efdctuidz 3, 8 # encoding: [0x10,0x60,0x42,0xea]
# CHECK-LE: efdctuidz 3, 8 # encoding: [0xea,0x42,0x60,0x10]
efdctuidz %r3, %r8
# CHECK-BE: efdctuiz 5, 17 # encoding: [0x10,0xa0,0x8a,0xf8]
# CHECK-LE: efdctuiz 5, 17 # encoding: [0xf8,0x8a,0xa0,0x10]
efdctuiz %r5, %r17
# CHECK-BE: efddiv 3, 4, 5 # encoding: [0x10,0x64,0x2a,0xe9]
# CHECK-LE: efddiv 3, 4, 5 # encoding: [0xe9,0x2a,0x64,0x10]
efddiv %r3, %r4, %r5
# CHECK-BE: efdmul 0, 3, 8 # encoding: [0x10,0x03,0x42,0xe8]
# CHECK-LE: efdmul 0, 3, 8 # encoding: [0xe8,0x42,0x03,0x10]
efdmul %r0, %r3, %r8
# CHECK-BE: efdnabs 3, 23 # encoding: [0x10,0x77,0x02,0xe5]
# CHECK-LE: efdnabs 3, 23 # encoding: [0xe5,0x02,0x77,0x10]
efdnabs %r3, %r23
# CHECK-BE: efdneg 3, 22 # encoding: [0x10,0x76,0x02,0xe6]
# CHECK-LE: efdneg 3, 22 # encoding: [0xe6,0x02,0x76,0x10]
efdneg %r3, %r22
# CHECK-BE: efdsub 3, 4, 6 # encoding: [0x10,0x64,0x32,0xe1]
# CHECK-LE: efdsub 3, 4, 6 # encoding: [0xe1,0x32,0x64,0x10]
efdsub %r3, %r4, %r6
# CHECK-BE: efdtsteq 3, 4, 5 # encoding: [0x11,0x84,0x2a,0xfe]
# CHECK-LE: efdtsteq 3, 4, 5 # encoding: [0xfe,0x2a,0x84,0x11]
efdtsteq %cr3, %r4, %r5
# CHECK-BE: efdtstgt 3, 3, 6 # encoding: [0x11,0x83,0x32,0xfc]
# CHECK-LE: efdtstgt 3, 3, 6 # encoding: [0xfc,0x32,0x83,0x11]
efdtstgt %cr3, %r3, %r6
# CHECK-BE: efdtstlt 4, 0, 3 # encoding: [0x12,0x00,0x1a,0xfd]
# CHECK-LE: efdtstlt 4, 0, 3 # encoding: [0xfd,0x1a,0x00,0x12]
efdtstlt %cr4, %r0, %r3
# CHECK-BE: efsabs 3, 4 # encoding: [0x10,0x64,0x02,0xc4]
# CHECK-LE: efsabs 3, 4 # encoding: [0xc4,0x02,0x64,0x10]
efsabs %r3, %r4
# CHECK-BE: efsadd 3, 4, 5 # encoding: [0x10,0x64,0x2a,0xc0]
# CHECK-LE: efsadd 3, 4, 5 # encoding: [0xc0,0x2a,0x64,0x10]
efsadd %r3, %r4, %r5
# CHECK-BE: efscfsf 5, 6 # encoding: [0x10,0xa0,0x32,0xd3]
# CHECK-LE: efscfsf 5, 6 # encoding: [0xd3,0x32,0xa0,0x10]
efscfsf %r5, %r6
# CHECK-BE: efscfsi 5, 6 # encoding: [0x10,0xa0,0x32,0xd1]
# CHECK-LE: efscfsi 5, 6 # encoding: [0xd1,0x32,0xa0,0x10]
efscfsi %r5, %r6
# CHECK-BE: efscfuf 5, 8 # encoding: [0x10,0xa0,0x42,0xd2]
# CHECK-LE: efscfuf 5, 8 # encoding: [0xd2,0x42,0xa0,0x10]
efscfuf %r5, %r8
# CHECK-BE: efscfui 6, 9 # encoding: [0x10,0xc0,0x4a,0xd0]
# CHECK-LE: efscfui 6, 9 # encoding: [0xd0,0x4a,0xc0,0x10]
efscfui %r6, %r9
# CHECK-BE: efscmpeq 3, 3, 8 # encoding: [0x11,0x83,0x42,0xce]
# CHECK-LE: efscmpeq 3, 3, 8 # encoding: [0xce,0x42,0x83,0x11]
efscmpeq %cr3, %r3, %r8
# CHECK-BE: efscmpgt 4, 7, 3 # encoding: [0x12,0x07,0x1a,0xcc]
# CHECK-LE: efscmpgt 4, 7, 3 # encoding: [0xcc,0x1a,0x07,0x12]
efscmpgt %cr4, %r7, %r3
# CHECK-BE: efscmplt 2, 3, 4 # encoding: [0x11,0x03,0x22,0xcd]
# CHECK-LE: efscmplt 2, 3, 4 # encoding: [0xcd,0x22,0x03,0x11]
efscmplt %cr2, %r3, %r4
# CHECK-BE: efsctsf 5, 3 # encoding: [0x10,0xa0,0x1a,0xd7]
# CHECK-LE: efsctsf 5, 3 # encoding: [0xd7,0x1a,0xa0,0x10]
efsctsf %r5, %r3
# CHECK-BE: efsctsi 6, 4 # encoding: [0x10,0xc0,0x22,0xd5]
# CHECK-LE: efsctsi 6, 4 # encoding: [0xd5,0x22,0xc0,0x10]
efsctsi %r6, %r4
# CHECK-BE: efsctsiz 3, 4 # encoding: [0x10,0x60,0x22,0xda]
# CHECK-LE: efsctsiz 3, 4 # encoding: [0xda,0x22,0x60,0x10]
efsctsiz %r3, %r4
# CHECK-BE: efsctuf 5, 8 # encoding: [0x10,0xa0,0x42,0xd6]
# CHECK-LE: efsctuf 5, 8 # encoding: [0xd6,0x42,0xa0,0x10]
efsctuf %r5, %r8
# CHECK-BE: efsctui 9, 10 # encoding: [0x11,0x20,0x52,0xd4]
# CHECK-LE: efsctui 9, 10 # encoding: [0xd4,0x52,0x20,0x11]
efsctui %r9, %r10
# CHECK-BE: efsctuiz 5, 17 # encoding: [0x10,0xa0,0x8a,0xd8]
# CHECK-LE: efsctuiz 5, 17 # encoding: [0xd8,0x8a,0xa0,0x10]
efsctuiz %r5, %r17
# CHECK-BE: efsdiv 3, 4, 5 # encoding: [0x10,0x64,0x2a,0xc9]
# CHECK-LE: efsdiv 3, 4, 5 # encoding: [0xc9,0x2a,0x64,0x10]
efsdiv %r3, %r4, %r5
# CHECK-BE: efsmul 0, 3, 8 # encoding: [0x10,0x03,0x42,0xc8]
# CHECK-LE: efsmul 0, 3, 8 # encoding: [0xc8,0x42,0x03,0x10]
efsmul %r0, %r3, %r8
# CHECK-BE: efsnabs 3, 23 # encoding: [0x10,0x77,0x02,0xc5]
# CHECK-LE: efsnabs 3, 23 # encoding: [0xc5,0x02,0x77,0x10]
efsnabs %r3, %r23
# CHECK-BE: efsneg 3, 22 # encoding: [0x10,0x76,0x02,0xc6]
# CHECK-LE: efsneg 3, 22 # encoding: [0xc6,0x02,0x76,0x10]
efsneg %r3, %r22
# CHECK-BE: efssub 3, 4, 6 # encoding: [0x10,0x64,0x32,0xc1]
# CHECK-LE: efssub 3, 4, 6 # encoding: [0xc1,0x32,0x64,0x10]
efssub %r3, %r4, %r6
# CHECK-BE: efststeq 3, 4, 5 # encoding: [0x11,0x84,0x2a,0xde]
# CHECK-LE: efststeq 3, 4, 5 # encoding: [0xde,0x2a,0x84,0x11]
efststeq %cr3, %r4, %r5
# CHECK-BE: efststgt 3, 3, 6 # encoding: [0x11,0x83,0x32,0xdc]
# CHECK-LE: efststgt 3, 3, 6 # encoding: [0xdc,0x32,0x83,0x11]
efststgt %cr3, %r3, %r6
# CHECK-BE: efststlt 4, 0, 3 # encoding: [0x12,0x00,0x1a,0xdd]
# CHECK-LE: efststlt 4, 0, 3 # encoding: [0xdd,0x1a,0x00,0x12]
efststlt %cr4, %r0, %r3