forked from OSchip/llvm-project
AMDGPU: Fix isAlwaysUniform for simple asm SGPR results
We were handling the case where the result was a struct with an extracted SGPR component, but not for the simple case.
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@ -710,6 +710,12 @@ bool GCNTTIImpl::isAlwaysUniform(const Value *V) const {
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}
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}
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if (const CallInst *CI = dyn_cast<CallInst>(V)) {
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if (isa<InlineAsm>(CI->getCalledValue()))
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return !isInlineAsmSourceOfDivergence(CI);
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return false;
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}
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const ExtractValueInst *ExtValue = dyn_cast<ExtractValueInst>(V);
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if (!ExtValue)
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return false;
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@ -1,6 +1,6 @@
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; RUN: opt -mtriple amdgcn-unknown-amdhsa -analyze -divergence -use-gpu-divergence-analysis %s | FileCheck %s
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; CHECK: for function 'readfirstlane':
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; CHECK-LABEL: for function 'readfirstlane':
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define amdgpu_kernel void @readfirstlane() {
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%id.x = call i32 @llvm.amdgcn.workitem.id.x()
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; CHECK: DIVERGENT: %id.x = call i32 @llvm.amdgcn.workitem.id.x()
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@ -9,20 +9,42 @@ define amdgpu_kernel void @readfirstlane() {
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ret void
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}
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; CHECK: for function 'icmp':
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; CHECK-LABEL: for function 'icmp':
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define amdgpu_kernel void @icmp(i32 inreg %x) {
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; CHECK-NOT: DIVERGENT: %icmp = call i64 @llvm.amdgcn.icmp.i32
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%icmp = call i64 @llvm.amdgcn.icmp.i32(i32 %x, i32 0, i32 33)
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ret void
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}
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; CHECK: for function 'fcmp':
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; CHECK-LABEL: for function 'fcmp':
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define amdgpu_kernel void @fcmp(float inreg %x, float inreg %y) {
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; CHECK-NOT: DIVERGENT: %fcmp = call i64 @llvm.amdgcn.fcmp.i32
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%fcmp = call i64 @llvm.amdgcn.fcmp.i32(float %x, float %y, i32 33)
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ret void
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}
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; SGPR asm outputs are uniform regardless of the input operands.
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; CHECK-LABEL: for function 'asm_sgpr':
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; CHECK: DIVERGENT: i32 %divergent
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; CHECK-NOT: DIVERGENT
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define i32 @asm_sgpr(i32 %divergent) {
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%sgpr = call i32 asm "; def $0, $1","=s,v"(i32 %divergent)
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ret i32 %sgpr
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}
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; CHECK-LABEL: Printing analysis 'Legacy Divergence Analysis' for function 'asm_mixed_sgpr_vgpr':
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; CHECK: DIVERGENT: %asm = call { i32, i32 } asm "; def $0, $1, $2", "=s,=v,v"(i32 %divergent)
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; CHECK-NEXT: {{^[ \t]+}}%sgpr = extractvalue { i32, i32 } %asm, 0
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; CHECK-NEXT: DIVERGENT: %vgpr = extractvalue { i32, i32 } %asm, 1
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define void @asm_mixed_sgpr_vgpr(i32 %divergent) {
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%asm = call { i32, i32 } asm "; def $0, $1, $2","=s,=v,v"(i32 %divergent)
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%sgpr = extractvalue { i32, i32 } %asm, 0
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%vgpr = extractvalue { i32, i32 } %asm, 1
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store i32 %sgpr, i32 addrspace(1)* undef
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store i32 %vgpr, i32 addrspace(1)* undef
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ret void
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}
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.readfirstlane(i32) #0
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declare i64 @llvm.amdgcn.icmp.i32(i32, i32, i32) #1
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