forked from OSchip/llvm-project
parent
36d3e03fa0
commit
4f5bad8d2e
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@ -17,6 +17,7 @@ class MachineRegInfo;
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class MachineFrameInfo;
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class MachineCacheInfo;
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class PassManager;
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class Pass;
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//---------------------------------------------------------------------------
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// class TargetMachine
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@ -62,17 +63,35 @@ public:
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virtual const MachineFrameInfo& getFrameInfo() const = 0;
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virtual const MachineCacheInfo& getCacheInfo() const = 0;
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//
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// Data storage information
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//
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virtual unsigned int findOptimalStorageSize (const Type* ty) const;
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//
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// addPassesToEmitAssembly - Add passes to the specified pass manager to get
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// assembly langage code emited. Typically this will involve several steps of
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// code generation.
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// code generation. This provides a default ordering of passes that could
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// be overridden for a particular target.
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//
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virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out) = 0;
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virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
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// getPrologEpilogCodeInserter - Create pass to insert prolog/epilog code.
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//
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virtual Pass* getPrologEpilogInsertionPass() = 0;
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// getFunctionAsmPrinterPass - Create a pass to write out the generated
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// machine code for a single function to the generated assembly file.
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//
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virtual Pass* getFunctionAsmPrinterPass(std::ostream &Out) = 0;
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// getModuleAsmPrinterPass - Create a pass to write out module-level
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// information to the generated assembly file.
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//
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virtual Pass* getModuleAsmPrinterPass(std::ostream &Out) = 0;
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// getEmitBytecodeToAsmPass - Create a pass to emit the final LLVM bytecode
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// to the generated assembly file.
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//
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virtual Pass* getEmitBytecodeToAsmPass(std::ostream &Out) = 0;
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};
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#endif
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