forked from OSchip/llvm-project
1. In indirect load/store insns , the name of fsr should be emitted as INDF.
2. include standard asmbly headers in generated asmbly. llvm-svn: 91768
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@ -170,7 +170,16 @@ void PIC16AsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
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switch (MO.getType()) {
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case MachineOperand::MO_Register:
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O << getRegisterName(MO.getReg());
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{
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// For indirect load/store insns, the fsr name is printed as INDF.
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std::string RegName = getRegisterName(MO.getReg());
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if ((MI->getOpcode() == PIC16::load_indirect) ||
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(MI->getOpcode() == PIC16::store_indirect))
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{
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RegName.replace (0, 3, "INDF");
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}
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O << RegName;
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}
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return;
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case MachineOperand::MO_Immediate:
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@ -263,10 +272,9 @@ void PIC16AsmPrinter::printLibcallDecls() {
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bool PIC16AsmPrinter::doInitialization(Module &M) {
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bool Result = AsmPrinter::doInitialization(M);
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// FIXME:: This is temporary solution to generate the include file.
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// The processor should be passed to llc as in input and the header file
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// should be generated accordingly.
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O << "\n\t#include P16F1937.INC\n";
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// Every asmbly contains these std headers.
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O << "\n#include p16f1xxx.inc";
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O << "\n#include stdmacros.inc";
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// Set the section names for all globals.
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for (Module::global_iterator I = M.global_begin(), E = M.global_end();
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