forked from OSchip/llvm-project
Fix codegen passes. -disable-ssc shouldn't disable postra machine licm.
llvm-svn: 101622
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@ -50,6 +50,9 @@ static cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden,
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cl::desc("Disable Stack Slot Coloring"));
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static cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden,
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cl::desc("Disable Machine LICM"));
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static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
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cl::Hidden,
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cl::desc("Disable Machine LICM"));
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static cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden,
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cl::desc("Disable Machine Sinking"));
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static cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden,
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@ -337,15 +340,18 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM,
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PM.add(createRegisterAllocator());
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printAndVerify(PM, "After Register Allocation");
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// Perform stack slot coloring.
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if (OptLevel != CodeGenOpt::None && !DisableSSC) {
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// Perform stack slot coloring and post-ra machine LICM.
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if (OptLevel != CodeGenOpt::None) {
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// FIXME: Re-enable coloring with register when it's capable of adding
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// kill markers.
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PM.add(createStackSlotColoringPass(false));
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printAndVerify(PM, "After StackSlotColoring");
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if (!DisableSSC)
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PM.add(createStackSlotColoringPass(false));
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// Run post-ra machine LICM to hoist reloads / remats.
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PM.add(createMachineLICMPass(false));
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if (!DisablePostRAMachineLICM)
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PM.add(createMachineLICMPass(false));
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printAndVerify(PM, "After StackSlotColoring and postra Machine LICM");
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}
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// Run post-ra passes.
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