forked from OSchip/llvm-project
Factor out common code, support FP comparison in folded SetCC
llvm-svn: 20969
This commit is contained in:
parent
6215b35918
commit
4f3a9860d3
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@ -462,7 +462,8 @@ public:
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ExprMap.clear();
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}
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unsigned ISel::getGlobalBaseReg();
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unsigned getGlobalBaseReg();
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unsigned SelectSetCR0(SDOperand CC);
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unsigned SelectExpr(SDOperand N);
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unsigned SelectExprFP(SDOperand N, unsigned Result);
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void Select(SDOperand N);
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@ -546,7 +547,42 @@ unsigned ISel::getGlobalBaseReg() {
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return GlobalBaseReg;
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}
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//Check to see if the load is a constant offset from a base register
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unsigned ISel::SelectSetCR0(SDOperand CC) {
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unsigned Opc, Tmp1, Tmp2;
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static const unsigned CompareOpcodes[] =
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{ PPC::FCMPU, PPC::FCMPU, PPC::CMPW, PPC::CMPLW };
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// If the first operand to the select is a SETCC node, then we can fold it
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// into the branch that selects which value to return.
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SetCCSDNode* SetCC = dyn_cast<SetCCSDNode>(CC.Val);
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if (SetCC && CC.getOpcode() == ISD::SETCC) {
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bool U;
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Opc = getBCCForSetCC(SetCC->getCondition(), U);
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Tmp1 = SelectExpr(SetCC->getOperand(0));
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// Pass the optional argument U to canUseAsImmediateForOpcode for SETCC,
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// so that it knows whether the SETCC immediate range is signed or not.
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if (1 == canUseAsImmediateForOpcode(SetCC->getOperand(1), ISD::SETCC,
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Tmp2, U)) {
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if (U)
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(Tmp2);
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else
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BuildMI(BB, PPC::CMPWI, 2, PPC::CR0).addReg(Tmp1).addSImm(Tmp2);
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} else {
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bool IsInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
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unsigned CompareOpc = CompareOpcodes[2 * IsInteger + U];
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Tmp2 = SelectExpr(SetCC->getOperand(1));
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BuildMI(BB, CompareOpc, 2, PPC::CR0).addReg(Tmp1).addReg(Tmp2);
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}
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} else {
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Tmp1 = SelectExpr(CC);
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0);
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Opc = PPC::BNE;
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}
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return Opc;
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}
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/// Check to see if the load is a constant offset from a base register
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void ISel::SelectAddr(SDOperand N, unsigned& Reg, int& offset)
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{
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unsigned imm = 0, opcode = N.getOpcode();
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@ -567,37 +603,8 @@ void ISel::SelectBranchCC(SDOperand N)
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MachineBasicBlock *Dest =
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cast<BasicBlockSDNode>(N.getOperand(2))->getBasicBlock();
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unsigned Opc, Tmp1, Tmp2;
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Select(N.getOperand(0)); //chain
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// If the first operand to the select is a SETCC node, then we can fold it
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// into the branch that selects which value to return.
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SetCCSDNode* SetCC = dyn_cast<SetCCSDNode>(N.getOperand(1).Val);
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if (SetCC && N.getOperand(1).getOpcode() == ISD::SETCC &&
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MVT::isInteger(SetCC->getOperand(0).getValueType())) {
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bool U;
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Opc = getBCCForSetCC(SetCC->getCondition(), U);
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Tmp1 = SelectExpr(SetCC->getOperand(0));
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// Pass the optional argument U to canUseAsImmediateForOpcode for SETCC,
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// so that it knows whether the SETCC immediate range is signed or not.
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if (1 == canUseAsImmediateForOpcode(SetCC->getOperand(1), ISD::SETCC,
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Tmp2, U)) {
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if (U)
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(Tmp2);
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else
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BuildMI(BB, PPC::CMPWI, 2, PPC::CR0).addReg(Tmp1).addSImm(Tmp2);
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} else {
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Tmp2 = SelectExpr(SetCC->getOperand(1));
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BuildMI(BB, U ? PPC::CMPLW : PPC::CMPW, 2, PPC::CR0).addReg(Tmp1)
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.addReg(Tmp2);
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}
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} else {
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Tmp1 = SelectExpr(N.getOperand(1));
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0);
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Opc = PPC::BNE;
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}
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unsigned Opc = SelectSetCR0(N.getOperand(1));
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BuildMI(BB, Opc, 2).addReg(PPC::CR0).addMBB(Dest);
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return;
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}
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@ -1201,32 +1208,7 @@ unsigned ISel::SelectExpr(SDOperand N) {
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case ISD::SETCC:
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if (SetCCSDNode *SetCC = dyn_cast<SetCCSDNode>(Node)) {
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bool U = false;
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bool IsInteger = MVT::isInteger(SetCC->getOperand(0).getValueType());
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// FIXME: Is there a situation in which we would ever need to emit fcmpo?
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static const unsigned CompareOpcodes[] =
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{ PPC::FCMPU, PPC::FCMPU, PPC::CMPW, PPC::CMPLW };
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// Set the branch opcode to use below
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Opc = getBCCForSetCC(SetCC->getCondition(), U);
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// Try and use an integer compare with immediate, if applicable.
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// Normal setcc uses the sign-extended immediate range, unsigned setcc
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// uses the zero extended immediate range.
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if (IsInteger &&
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1 == canUseAsImmediateForOpcode(N.getOperand(1), opcode, Tmp2, U)) {
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Tmp1 = SelectExpr(N.getOperand(0));
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if (U)
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(Tmp2);
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else
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BuildMI(BB, PPC::CMPWI, 2, PPC::CR0).addReg(Tmp1).addSImm(Tmp2);
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} else {
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Tmp1 = SelectExpr(N.getOperand(0));
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Tmp2 = SelectExpr(N.getOperand(1));
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unsigned CompareOpc = CompareOpcodes[2 * IsInteger + U];
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BuildMI(BB, CompareOpc, 2, PPC::CR0).addReg(Tmp1).addReg(Tmp2);
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}
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Opc = SelectSetCR0(N);
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// Create an iterator with which to insert the MBB for copying the false
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// value and the MBB to hold the PHI instruction for this SetCC.
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@ -1273,6 +1255,8 @@ unsigned ISel::SelectExpr(SDOperand N) {
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return 0;
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case ISD::SELECT: {
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Opc = SelectSetCR0(N.getOperand(0));
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// Create an iterator with which to insert the MBB for copying the false
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// value and the MBB to hold the PHI instruction for this SetCC.
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MachineBasicBlock *thisMBB = BB;
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@ -1280,34 +1264,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
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ilist<MachineBasicBlock>::iterator It = BB;
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++It;
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// If the first operand to the select is a SETCC node, then we can fold it
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// into the branch that selects which value to return.
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SetCCSDNode* SetCC = dyn_cast<SetCCSDNode>(N.getOperand(0).Val);
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if (SetCC && N.getOperand(0).getOpcode() == ISD::SETCC &&
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MVT::isInteger(SetCC->getOperand(0).getValueType())) {
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bool U;
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Opc = getBCCForSetCC(SetCC->getCondition(), U);
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Tmp1 = SelectExpr(SetCC->getOperand(0));
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// Pass the optional argument U to canUseAsImmediateForOpcode for SETCC,
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// so that it knows whether the SETCC immediate range is signed or not.
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if (1 == canUseAsImmediateForOpcode(SetCC->getOperand(1), ISD::SETCC,
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Tmp2, U)) {
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if (U)
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(Tmp2);
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else
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BuildMI(BB, PPC::CMPWI, 2, PPC::CR0).addReg(Tmp1).addSImm(Tmp2);
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} else {
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Tmp2 = SelectExpr(SetCC->getOperand(1));
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BuildMI(BB, U ? PPC::CMPLW : PPC::CMPW, 2, PPC::CR0).addReg(Tmp1)
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.addReg(Tmp2);
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}
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} else {
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Tmp1 = SelectExpr(N.getOperand(0)); //Cond
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BuildMI(BB, PPC::CMPLWI, 2, PPC::CR0).addReg(Tmp1).addImm(0);
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Opc = PPC::BNE;
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}
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// thisMBB:
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// ...
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// TrueVal = ...
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