forked from OSchip/llvm-project
Clang and AArch64 backend patches to support shll/shl and vmovl instructions and ACLE functions
llvm-svn: 188452
This commit is contained in:
Hao Liu
parent
cd8b02dce3
commit
4efa1402fe
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@ -152,6 +152,7 @@ class NoTestOpInst<string n, string p, string t, Op o> : Inst<n, p, t, o> {}
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// size modifiers:
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// U: unsigned
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// Q: 128b
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// H: 128b without mangling 'q'
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// P: polynomial
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////////////////////////////////////////////////////////////////////////////////
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@ -551,6 +552,18 @@ def FMINNMP : SInst<"vpminnm", "ddd", "fQfQd">;
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// With additional Qc Qs Qi QUc QUs QUi Qf Qd types.
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def ADDP : IInst<"vpadd", "ddd", "csiUcUsUifQcQsQiQUcQUsQUiQfQd">;
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////////////////////////////////////////////////////////////////////////////////
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// Shifts by constant
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let isShift = 1 in {
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// Left shift long high
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def SHLL_HIGH_N : SInst<"vshll_high_n", "ndi", "HcHsHiHUcHUsHUi">;
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}
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////////////////////////////////////////////////////////////////////////////////
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// Converting vectors
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def VMOVL_HIGH : SInst<"vmovl_high", "nd", "HcHsHiHUcHUsHUi">;
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////////////////////////////////////////////////////////////////////////////////
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// Scalar Arithmetic
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@ -1620,6 +1620,37 @@ static llvm::VectorType *GetNeonType(CodeGenFunction *CGF,
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llvm_unreachable("Invalid NeonTypeFlags element type!");
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}
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static Value *EmitExtendedSHL(CodeGenFunction &CGF,
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SmallVectorImpl<Value*> &Ops,
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llvm::VectorType *VTy, bool usgn, bool isHigh) {
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IRBuilder<> Builder = CGF.Builder;
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if (isHigh){
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unsigned NumElts = VTy->getNumElements();
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unsigned EltBits = VTy->getElementType()->getPrimitiveSizeInBits();
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llvm::Type *EltTy =
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llvm::IntegerType::get(VTy->getContext(), EltBits / 2);
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// The source operand type has twice as many elements of half the size.
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llvm::Type *SrcTy = llvm::VectorType::get(EltTy, NumElts * 2);
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SmallVector<Constant*, 8> Indices;
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for (unsigned i = 0; i != NumElts; i++)
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Indices.push_back(Builder.getInt32(i + NumElts));
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Value *SV = llvm::ConstantVector::get(Indices);
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Value *Undef = llvm::UndefValue::get(SrcTy);
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Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy);
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Ops[0] = Builder.CreateShuffleVector(Ops[0], Undef, SV);
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} else {
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llvm::Type *SrcTy = llvm::VectorType::getTruncatedElementVectorType(VTy);
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Ops[0] = Builder.CreateBitCast(Ops[0], SrcTy);
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}
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if (usgn)
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Ops[0] = Builder.CreateZExt(Ops[0], VTy);
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else
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Ops[0] = Builder.CreateSExt(Ops[0], VTy);
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Ops[1] = CGF.EmitNeonShiftVector(Ops[1], VTy, false);
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return Builder.CreateShl(Ops[0], Ops[1], "vshl_n");
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}
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Value *CodeGenFunction::EmitNeonSplat(Value *V, Constant *C) {
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unsigned nElts = cast<llvm::VectorType>(V->getType())->getNumElements();
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Value* SV = llvm::ConstantVector::getSplat(nElts, C);
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@ -1862,6 +1893,18 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrdmulh_v, E);
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case AArch64::BI__builtin_neon_vqrdmulhq_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vqrdmulhq_v, E);
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case AArch64::BI__builtin_neon_vshl_n_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshl_n_v, E);
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case AArch64::BI__builtin_neon_vshlq_n_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vshlq_n_v, E);
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case AArch64::BI__builtin_neon_vmovl_v:
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return EmitARMBuiltinExpr(ARM::BI__builtin_neon_vmovl_v, E);
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case AArch64::BI__builtin_neon_vshll_n_v:
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return EmitExtendedSHL(*this, Ops, VTy, usgn, false);
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case AArch64::BI__builtin_neon_vmovl_high_v:
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Ops.push_back(ConstantInt::get(Int32Ty, 0));
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case AArch64::BI__builtin_neon_vshll_high_n_v:
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return EmitExtendedSHL(*this, Ops, VTy, usgn, true);
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// AArch64-only builtins
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case AArch64::BI__builtin_neon_vfms_v:
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@ -3021,3 +3021,231 @@ float64x2_t test_vmulxq_f64(float64x2_t a, float64x2_t b) {
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// CHECK: fmulx {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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}
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int8x8_t test_vshl_n_s8(int8x8_t a) {
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// CHECK: test_vshl_n_s8
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return vshl_n_s8(a, 3);
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// CHECK: shl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #3
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}
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int16x4_t test_vshl_n_s16(int16x4_t a) {
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// CHECK: test_vshl_n_s16
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return vshl_n_s16(a, 3);
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// CHECK: shl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, #3
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}
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int32x2_t test_vshl_n_s32(int32x2_t a) {
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// CHECK: test_vshl_n_s32
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return vshl_n_s32(a, 3);
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// CHECK: shl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #3
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}
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int8x16_t test_vshlq_n_s8(int8x16_t a) {
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// CHECK: test_vshlq_n_s8
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return vshlq_n_s8(a, 3);
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// CHECK: shl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #3
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}
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int16x8_t test_vshlq_n_s16(int16x8_t a) {
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// CHECK: test_vshlq_n_s16
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return vshlq_n_s16(a, 3);
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// CHECK: shl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, #3
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}
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int32x4_t test_vshlq_n_s32(int32x4_t a) {
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// CHECK: test_vshlq_n_s32
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return vshlq_n_s32(a, 3);
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// CHECK: shl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #3
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}
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int64x2_t test_vshlq_n_s64(int64x2_t a) {
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// CHECK: test_vshlq_n_s64
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return vshlq_n_s64(a, 3);
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// CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #3
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}
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int8x8_t test_vshl_n_u8(int8x8_t a) {
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// CHECK: test_vshl_n_u8
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return vshl_n_u8(a, 3);
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// CHECK: shl {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, #3
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}
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int16x4_t test_vshl_n_u16(int16x4_t a) {
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// CHECK: test_vshl_n_u16
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return vshl_n_u16(a, 3);
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// CHECK: shl {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, #3
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}
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int32x2_t test_vshl_n_u32(int32x2_t a) {
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// CHECK: test_vshl_n_u32
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return vshl_n_u32(a, 3);
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// CHECK: shl {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #3
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}
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int8x16_t test_vshlq_n_u8(int8x16_t a) {
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// CHECK: test_vshlq_n_u8
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return vshlq_n_u8(a, 3);
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// CHECK: shl {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, #3
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}
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int16x8_t test_vshlq_n_u16(int16x8_t a) {
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// CHECK: test_vshlq_n_u16
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return vshlq_n_u16(a, 3);
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// CHECK: shl {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, #3
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}
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int32x4_t test_vshlq_n_u32(int32x4_t a) {
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// CHECK: test_vshlq_n_u32
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return vshlq_n_u32(a, 3);
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// CHECK: shl {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #3
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}
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int64x2_t test_vshlq_n_u64(int64x2_t a) {
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// CHECK: test_vshlq_n_u64
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return vshlq_n_u64(a, 3);
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// CHECK: shl {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #3
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}
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int16x8_t test_vshll_n_s8(int8x8_t a) {
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// CHECK: test_vshll_n_s8
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return vshll_n_s8(a, 3);
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// CHECK: sshll {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, #3
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}
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int32x4_t test_vshll_n_s16(int16x4_t a) {
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// CHECK: test_vshll_n_s16
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return vshll_n_s16(a, 9);
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// CHECK: sshll {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, #9
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}
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int64x2_t test_vshll_n_s32(int32x2_t a) {
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// CHECK: test_vshll_n_s32
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return vshll_n_s32(a, 19);
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// CHECK: sshll {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, #19
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}
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uint16x8_t test_vshll_n_u8(uint8x8_t a) {
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// CHECK: test_vshll_n_u8
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return vshll_n_u8(a, 3);
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// CHECK: ushll {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, #3
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}
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uint32x4_t test_vshll_n_u16(uint16x4_t a) {
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// CHECK: test_vshll_n_u16
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return vshll_n_u16(a, 9);
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// CHECK: ushll {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, #9
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}
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uint64x2_t test_vshll_n_u32(uint32x2_t a) {
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// CHECK: test_vshll_n_u32
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return vshll_n_u32(a, 19);
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// CHECK: ushll {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, #19
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}
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int16x8_t test_vshll_high_n_s8(int8x16_t a) {
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// CHECK: test_vshll_high_n_s8
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return vshll_high_n_s8(a, 3);
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// CHECK: sshll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #3
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}
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int32x4_t test_vshll_high_n_s16(int16x8_t a) {
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// CHECK: test_vshll_high_n_s16
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return vshll_high_n_s16(a, 9);
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// CHECK: sshll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #9
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}
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int64x2_t test_vshll_high_n_s32(int32x4_t a) {
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// CHECK: test_vshll_high_n_s32
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return vshll_high_n_s32(a, 19);
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// CHECK: sshll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #19
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}
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uint16x8_t test_vshll_high_n_u8(uint8x16_t a) {
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// CHECK: test_vshll_high_n_u8
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return vshll_high_n_u8(a, 3);
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// CHECK: ushll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #3
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}
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uint32x4_t test_vshll_high_n_u16(uint16x8_t a) {
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// CHECK: test_vshll_high_n_u16
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return vshll_high_n_u16(a, 9);
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// CHECK: ushll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #9
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}
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uint64x2_t test_vshll_high_n_u32(uint32x4_t a) {
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// CHECK: test_vshll_high_n_u32
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return vshll_high_n_u32(a, 19);
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// CHECK: ushll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #19
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}
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int16x8_t test_vmovl_s8(int8x8_t a) {
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// CHECK: test_vmovl_s8
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return vmovl_s8(a);
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// CHECK: sshll {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, #0
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}
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int32x4_t test_vmovl_s16(int16x4_t a) {
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// CHECK: test_vmovl_s16
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return vmovl_s16(a);
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// CHECK: sshll {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, #0
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}
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int64x2_t test_vmovl_s32(int32x2_t a) {
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// CHECK: test_vmovl_s32
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return vmovl_s32(a);
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// CHECK: sshll {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, #0
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}
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uint16x8_t test_vmovl_u8(uint8x8_t a) {
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// CHECK: test_vmovl_u8
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return vmovl_u8(a);
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// CHECK: ushll {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, #0
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}
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uint32x4_t test_vmovl_u16(uint16x4_t a) {
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// CHECK: test_vmovl_u16
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return vmovl_u16(a);
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// CHECK: ushll {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, #0
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}
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uint64x2_t test_vmovl_u32(uint32x2_t a) {
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// CHECK: test_vmovl_u32
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return vmovl_u32(a);
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// CHECK: ushll {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, #0
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}
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int16x8_t test_vmovl_high_s8(int8x16_t a) {
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// CHECK: test_vmovl_high_s8
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return vmovl_high_s8(a);
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// CHECK: sshll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #0
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}
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int32x4_t test_vmovl_high_s16(int16x8_t a) {
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// CHECK: test_vmovl_high_s16
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return vmovl_high_s16(a);
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// CHECK: sshll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #0
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}
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int64x2_t test_vmovl_high_s32(int32x4_t a) {
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// CHECK: test_vmovl_high_s32
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return vmovl_high_s32(a);
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// CHECK: sshll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #0
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}
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uint16x8_t test_vmovl_high_u8(uint8x16_t a) {
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// CHECK: test_vmovl_high_u8
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return vmovl_high_u8(a);
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// CHECK: ushll2 {{v[0-9]+}}.8h, {{v[0-9]+}}.16b, #0
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}
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uint32x4_t test_vmovl_high_u16(uint16x8_t a) {
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// CHECK: test_vmovl_high_u16
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return vmovl_high_u16(a);
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// CHECK: ushll2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, #0
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}
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uint64x2_t test_vmovl_high_u32(uint32x4_t a) {
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// CHECK: test_vmovl_high_u32
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return vmovl_high_u32(a);
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// CHECK: ushll2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, #0
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}
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@ -263,7 +263,8 @@ static void ParseTypes(Record *r, std::string &s,
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int len = 0;
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for (unsigned i = 0, e = s.size(); i != e; ++i, ++len) {
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if (data[len] == 'P' || data[len] == 'Q' || data[len] == 'U')
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if (data[len] == 'P' || data[len] == 'Q' || data[len] == 'U'
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|| data[len] == 'H')
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continue;
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switch (data[len]) {
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@ -325,7 +326,7 @@ static char ClassifyType(StringRef ty, bool &quad, bool &poly, bool &usgn) {
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unsigned off = 0;
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// remember quad.
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if (ty[off] == 'Q') {
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if (ty[off] == 'Q' || ty[off] == 'H') {
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quad = true;
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++off;
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}
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@ -689,8 +690,8 @@ static void InstructionTypeCode(const StringRef &typeStr,
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}
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/// MangleName - Append a type or width suffix to a base neon function name,
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/// and insert a 'q' in the appropriate location if the operation works on
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/// 128b rather than 64b. E.g. turn "vst2_lane" into "vst2q_lane_f32", etc.
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/// and insert a 'q' in the appropriate location if type string starts with 'Q'.
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/// E.g. turn "vst2_lane" into "vst2q_lane_f32", etc.
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static std::string MangleName(const std::string &name, StringRef typestr,
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ClassKind ck) {
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if (name == "vcvt_f32_f16")
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@ -712,9 +713,9 @@ static std::string MangleName(const std::string &name, StringRef typestr,
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// Insert a 'q' before the first '_' character so that it ends up before
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// _lane or _n on vector-scalar operations.
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if (quad) {
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size_t pos = s.find('_');
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s = s.insert(pos, "q");
|
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if (typestr.startswith("Q")) {
|
||||
size_t pos = s.find('_');
|
||||
s = s.insert(pos, "q");
|
||||
}
|
||||
|
||||
return s;
|
||||
|
|
|
|||
Loading…
Reference in New Issue