forked from OSchip/llvm-project
parent
f937c023bf
commit
4ef158335b
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@ -36,7 +36,7 @@ ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
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const MachineDominatorTree &mdt)
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: ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()),
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InstrItins(mf.getTarget().getInstrItineraryData()),
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Defs(TRI->getNumRegs()), Uses(TRI->getNumRegs()),
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Defs(TRI->getNumRegs()), Uses(TRI->getNumRegs()),
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LoopRegs(MLI, MDT), FirstDbgValue(0) {
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DbgValues.clear();
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}
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@ -109,7 +109,7 @@ namespace llvm {
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/// initialized and destructed for each block.
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std::vector<std::vector<SUnit *> > Defs;
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std::vector<std::vector<SUnit *> > Uses;
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/// PendingLoads - Remember where unknown loads are after the most recent
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/// unknown store, as we iterate. As with Defs and Uses, this is here
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/// to minimize construction/destruction.
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@ -127,7 +127,7 @@ namespace llvm {
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protected:
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/// DbgValues - Remember instruction that preceeds DBG_VALUE.
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typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
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typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
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DbgValueVector;
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DbgValueVector DbgValues;
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MachineInstr *FirstDbgValue;
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