From 4ee0acd326c2e9e05db9144008b5aa6362941b51 Mon Sep 17 00:00:00 2001
From: Anton Korobeynikov <asl@math.spbu.ru>
Date: Thu, 16 Jul 2009 13:55:51 +0000
Subject: [PATCH] Fix epic bug with invalid regclass for R0D

llvm-svn: 75956
---
 llvm/lib/Target/SystemZ/SystemZRegisterInfo.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
index e047150d6a74..bdff54262f9e 100644
--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.td
@@ -144,7 +144,7 @@ def : SubRegSet<5, [R0P, R2P, R4P, R6P, R8P, R10P, R12P, R14P],
 /// Register classes
 def GR32 : RegisterClass<"SystemZ", [i32], 32,
    // Volatile registers
-  [R0D, R1W, R2W, R3W, R4W, R5W, R6W, R7W, R8W, R9W, R10W, R12W, R13W,
+  [R0W, R1W, R2W, R3W, R4W, R5W, R6W, R7W, R8W, R9W, R10W, R12W, R13W,
    // Frame pointer, sometimes allocable
    R11W,
    // Volatile, but not allocable