forked from OSchip/llvm-project
Fix minor deficiency in machine-sink.
Register uses that are MRI->isConstantPhysReg() should not inhibit sinking transformation. Reviewed By: StephenTozer Differential Revision: https://reviews.llvm.org/D111531
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c265170110
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@ -1324,7 +1324,8 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
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// "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
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for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) {
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const MachineOperand &MO = MI.getOperand(I);
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if (!MO.isReg()) continue;
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if (!MO.isReg() || MO.isUse())
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continue;
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Register Reg = MO.getReg();
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if (Reg == 0 || !Register::isPhysicalRegister(Reg))
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continue;
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@ -0,0 +1,33 @@
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# RUN: llc -mtriple=riscv32 %s -run-pass=machine-sink -o - | FileCheck %s
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# Verify that sinking of '%20:gpr = LUI 1, implicit $x0' is not inhibited by
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# the implicit use of '$x0'.
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# Register '$x0' is a 'MRI->isConstantPhysReg()' on RISCV and such uses should
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# not inhibit sinking transformation even though they are livein to the block
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# they are to be sunk into (inhibit under such conditions should only happen
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# for defines).
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---
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name: f
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: bb.1:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[LUI:%[0-9]+]]:gpr = LUI 1, implicit $x0
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bb.0:
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liveins: $x10
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%10:gpr = COPY $x10
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%20:gpr = LUI 1, implicit $x0
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BEQ %10, %10, %bb.2
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PseudoBR %bb.1
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bb.1:
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liveins: $x0
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%30:gpr = ADDI %20, 5
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PseudoBR %bb.3
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bb.2:
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PseudoBR %bb.3
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bb.3:
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PseudoRET
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...
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