forked from OSchip/llvm-project
SelectionDAG: minor fix to order of operands in comments to match the code
llvm-svn: 184008
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ddee9a91a2
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@ -6008,7 +6008,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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if (N0.getOpcode() == ISD::FADD && AllowNewFpConst) {
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ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N0.getOperand(0));
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// (fadd (fadd x, x), x) -> (fmul 3.0, x)
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// (fadd (fadd x, x), x) -> (fmul x, 3.0)
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if (!CFP && N0.getOperand(0) == N0.getOperand(1) &&
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(N0.getOperand(0) == N1)) {
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return DAG.getNode(ISD::FMUL, SDLoc(N), VT,
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@ -6018,7 +6018,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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if (N1.getOpcode() == ISD::FADD && AllowNewFpConst) {
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ConstantFPSDNode *CFP10 = dyn_cast<ConstantFPSDNode>(N1.getOperand(0));
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// (fadd x, (fadd x, x)) -> (fmul 3.0, x)
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// (fadd x, (fadd x, x)) -> (fmul x, 3.0)
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if (!CFP10 && N1.getOperand(0) == N1.getOperand(1) &&
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N1.getOperand(0) == N0) {
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return DAG.getNode(ISD::FMUL, SDLoc(N), VT,
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@ -6026,7 +6026,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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}
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}
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// (fadd (fadd x, x), (fadd x, x)) -> (fmul 4.0, x)
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// (fadd (fadd x, x), (fadd x, x)) -> (fmul x, 4.0)
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if (AllowNewFpConst &&
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N0.getOpcode() == ISD::FADD && N1.getOpcode() == ISD::FADD &&
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N0.getOperand(0) == N0.getOperand(1) &&
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