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[AArch64] Fix instructions order (NFC) 

llvm-svn: 349568
This commit is contained in:
Evandro Menezes 2018-12-18 23:19:55 +00:00
parent 031abc2bd7
commit 4e39fa4474
1 changed files with 4 additions and 4 deletions
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8
llvm/lib/Target/AArch64/AArch64SchedExynosM1.td
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@ -440,13 +440,13 @@ def : InstRW<[M1WriteCOPY], (instrs COPY)>;
// Miscellaneous instructions. // Miscellaneous instructions.
// Load instructions. // Load instructions.
def : InstRW<[M1WriteLC,
ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roW")>;
def : InstRW<[M1WriteL5,
ReadAdrBase], (instregex "^LDR(BB|HH|SBW|SBX|SHW|SWX|SW|W|X)roX")>;
def : InstRW<[M1WriteLB, def : InstRW<[M1WriteLB,
WriteLDHi, WriteLDHi,
WriteAdr], (instregex "^LDP(SW|W|X)(post|pre)")>; WriteAdr], (instregex "^LDP(SW|W|X)(post|pre)")>;
def : InstRW<[M1WriteLC,
ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roW")>;
def : InstRW<[M1WriteL5,
ReadAdrBase], (instregex "^LDR(BB|SBW|SBX|HH|SHW|SHX|SW|W|X)roX")>;
def : InstRW<[M1WriteLC, def : InstRW<[M1WriteLC,
ReadAdrBase], (instrs PRFMroW)>; ReadAdrBase], (instrs PRFMroW)>;
def : InstRW<[M1WriteL5, def : InstRW<[M1WriteL5,