maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Add support to print %hh, %hm, %lm, or %lo in an operand field. 

llvm-svn: 2857
This commit is contained in:
Vikram S. Adve 2002-07-10 21:41:21 +00:00
parent 58c904ace6
commit 4e1ee14694
1 changed files with 30 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
llvm/lib/Target/Sparc/EmitAssembly.cpp
View File

@ -259,47 +259,60 @@ SparcFunctionAsmPrinter::OpIsMemoryAddressBase(const MachineInstr *MI,
} }
#define PrintOp1PlusOp2(Op1, Op2) \ #define PrintOp1PlusOp2(mop1, mop2) \
printOneOperand(Op1); \ printOneOperand(mop1); \
toAsm << "+"; \ toAsm << "+"; \
printOneOperand(Op2); printOneOperand(mop2);
unsigned int unsigned int
SparcFunctionAsmPrinter::printOperands(const MachineInstr *MI, SparcFunctionAsmPrinter::printOperands(const MachineInstr *MI,
unsigned int opNum) unsigned int opNum)
{ {
const MachineOperand& Op = MI->getOperand(opNum); const MachineOperand& mop = MI->getOperand(opNum);
if (OpIsBranchTargetLabel(MI, opNum)) if (OpIsBranchTargetLabel(MI, opNum))
{ {
PrintOp1PlusOp2(Op, MI->getOperand(opNum+1)); PrintOp1PlusOp2(mop, MI->getOperand(opNum+1));
return 2; return 2;
} }
else if (OpIsMemoryAddressBase(MI, opNum)) else if (OpIsMemoryAddressBase(MI, opNum))
{ {
toAsm << "["; toAsm << "[";
PrintOp1PlusOp2(Op, MI->getOperand(opNum+1)); PrintOp1PlusOp2(mop, MI->getOperand(opNum+1));
toAsm << "]"; toAsm << "]";
return 2; return 2;
} }
else else
{ {
printOneOperand(Op); printOneOperand(mop);
return 1; return 1;
} }
} }
void void
SparcFunctionAsmPrinter::printOneOperand(const MachineOperand &op) SparcFunctionAsmPrinter::printOneOperand(const MachineOperand &mop)
{ {
switch (op.getOperandType()) bool needBitsFlag = true;
if (mop.opHiBits32())
toAsm << "%lm(";
else if (mop.opLoBits32())
toAsm << "%lo(";
else if (mop.opHiBits64())
toAsm << "%hh(";
else if (mop.opLoBits64())
toAsm << "%hm(";
else
needBitsFlag = false;
switch (mop.getOperandType())
{ {
case MachineOperand::MO_VirtualRegister: case MachineOperand::MO_VirtualRegister:
case MachineOperand::MO_CCRegister: case MachineOperand::MO_CCRegister:
case MachineOperand::MO_MachineRegister: case MachineOperand::MO_MachineRegister:
{ {
int RegNum = (int)op.getAllocatedRegNum(); int RegNum = (int)mop.getAllocatedRegNum();
// better to print code with NULL registers than to die // better to print code with NULL registers than to die
if (RegNum == Target.getRegInfo().getInvalidRegNum()) { if (RegNum == Target.getRegInfo().getInvalidRegNum()) {
@ -312,7 +325,7 @@ SparcFunctionAsmPrinter::printOneOperand(const MachineOperand &op)
case MachineOperand::MO_PCRelativeDisp: case MachineOperand::MO_PCRelativeDisp:
{ {
const Value *Val = op.getVRegValue(); const Value *Val = mop.getVRegValue();
assert(Val && "\tNULL Value in SparcFunctionAsmPrinter"); assert(Val && "\tNULL Value in SparcFunctionAsmPrinter");
if (const BasicBlock *BB = dyn_cast<const BasicBlock>(Val)) if (const BasicBlock *BB = dyn_cast<const BasicBlock>(Val))
@ -329,17 +342,20 @@ SparcFunctionAsmPrinter::printOneOperand(const MachineOperand &op)
} }
case MachineOperand::MO_SignExtendedImmed: case MachineOperand::MO_SignExtendedImmed:
toAsm << op.getImmedValue(); toAsm << mop.getImmedValue();
break; break;
case MachineOperand::MO_UnextendedImmed: case MachineOperand::MO_UnextendedImmed:
toAsm << (uint64_t) op.getImmedValue(); toAsm << (uint64_t) mop.getImmedValue();
break; break;
default: default:
toAsm << op; // use dump field toAsm << mop; // use dump field
break; break;
} }
if (needBitsFlag)
toAsm << ")";
} }