forked from OSchip/llvm-project
Revert r313400 "[DebugInfo] Insert DW_OP_deref when spilling indirect DBG_VALUEs"
This caused asserts in Chromium. See http://crbug.com/766261 > Summary: > This comes up in optimized debug info for C++ programs that pass and > return objects indirectly by address. In these programs, > llvm.dbg.declare survives optimization, which causes us to emit indirect > DBG_VALUE instructions. The fast register allocator knows to insert > DW_OP_deref when spilling indirect DBG_VALUE instructions, but the > LiveDebugVariables did not until this change. > > This fixes part of PR34513. I need to look into why this doesn't work at > -O0 and I'll send follow up patches to handle that. > > Reviewers: aprantl, dblaikie, probinson > > Subscribers: qcolombet, hiraditya, llvm-commits > > Differential Revision: https://reviews.llvm.org/D37911 llvm-svn: 313589
This commit is contained in:
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@ -108,8 +108,8 @@ class LDVImpl;
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/// held by the same virtual register. The equivalence class is the transitive
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/// closure of that relation.
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class UserValue {
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const DILocalVariable *Variable; ///< The debug info variable we are part of.
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const DIExpression *Expression; ///< Any complex address expression.
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const MDNode *Variable; ///< The debug info variable we are part of.
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const MDNode *Expression; ///< Any complex address expression.
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bool IsIndirect; ///< true if this is a register-indirect+offset value.
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DebugLoc dl; ///< The debug location for the variable. This is
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///< used by dwarf writer to find lexical scope.
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@ -132,9 +132,8 @@ class UserValue {
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void coalesceLocation(unsigned LocNo);
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/// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
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void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
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unsigned LocNo, bool Spilled, LiveIntervals &LIS,
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const TargetInstrInfo &TII);
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void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
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LiveIntervals &LIS, const TargetInstrInfo &TII);
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/// splitLocation - Replace OldLocNo ranges with NewRegs ranges where NewRegs
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/// is live. Returns true if any changes were made.
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@ -143,8 +142,8 @@ class UserValue {
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public:
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/// UserValue - Create a new UserValue.
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UserValue(const DILocalVariable *var, const DIExpression *expr, bool i,
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DebugLoc L, LocMap::Allocator &alloc)
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UserValue(const MDNode *var, const MDNode *expr, bool i, DebugLoc L,
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LocMap::Allocator &alloc)
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: Variable(var), Expression(expr), IsIndirect(i), dl(std::move(L)),
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leader(this), locInts(alloc) {}
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@ -160,8 +159,8 @@ public:
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UserValue *getNext() const { return next; }
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/// match - Does this UserValue match the parameters?
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bool match(const DILocalVariable *Var, const DIExpression *Expr,
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const DILocation *IA, bool indirect) const {
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bool match(const MDNode *Var, const MDNode *Expr, const DILocation *IA,
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bool indirect) const {
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return Var == Variable && Expr == Expression && dl->getInlinedAt() == IA &&
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indirect == IsIndirect;
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}
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@ -265,14 +264,12 @@ public:
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LiveIntervals &LIS);
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/// rewriteLocations - Rewrite virtual register locations according to the
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/// provided virtual register map. Record which locations were spilled.
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void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
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BitVector &SpilledLocations);
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/// provided virtual register map.
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void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
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/// emitDebugValues - Recreate DBG_VALUE instruction from data structures.
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void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
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const TargetInstrInfo &TRI,
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const BitVector &SpilledLocations);
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void emitDebugValues(VirtRegMap *VRM,
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LiveIntervals &LIS, const TargetInstrInfo &TRI);
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/// getDebugLoc - Return DebugLoc of this UserValue.
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DebugLoc getDebugLoc() { return dl;}
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@ -302,11 +299,11 @@ class LDVImpl {
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VRMap virtRegToEqClass;
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/// Map user variable to eq class leader.
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using UVMap = DenseMap<const DILocalVariable *, UserValue *>;
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using UVMap = DenseMap<const MDNode *, UserValue *>;
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UVMap userVarMap;
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/// getUserValue - Find or create a UserValue.
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UserValue *getUserValue(const DILocalVariable *Var, const DIExpression *Expr,
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UserValue *getUserValue(const MDNode *Var, const MDNode *Expr,
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bool IsIndirect, const DebugLoc &DL);
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/// lookupVirtReg - Find the EC leader for VirtReg or null.
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@ -459,9 +456,8 @@ void UserValue::mapVirtRegs(LDVImpl *LDV) {
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LDV->mapVirtReg(locations[i].getReg(), this);
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}
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UserValue *LDVImpl::getUserValue(const DILocalVariable *Var,
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const DIExpression *Expr, bool IsIndirect,
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const DebugLoc &DL) {
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UserValue *LDVImpl::getUserValue(const MDNode *Var, const MDNode *Expr,
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bool IsIndirect, const DebugLoc &DL) {
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UserValue *&Leader = userVarMap[Var];
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if (Leader) {
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UserValue *UV = Leader->getLeader();
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@ -500,11 +496,11 @@ bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
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}
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// Get or create the UserValue for (variable,offset).
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bool IsIndirect = MI.getOperand(1).isImm();
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bool IsIndirect = MI.isIndirectDebugValue();
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if (IsIndirect)
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assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
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const DILocalVariable *Var = MI.getDebugVariable();
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const DIExpression *Expr = MI.getDebugExpression();
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const MDNode *Var = MI.getDebugVariable();
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const MDNode *Expr = MI.getDebugExpression();
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//here.
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UserValue *UV = getUserValue(Var, Expr, IsIndirect, MI.getDebugLoc());
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UV->addDef(Idx, MI.getOperand(0));
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@ -977,10 +973,8 @@ splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) {
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static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
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}
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void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
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BitVector &SpilledLocations) {
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SpilledLocations.resize(locations.size());
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void
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UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) {
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// Iterate over locations in reverse makes it easier to handle coalescing.
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for (unsigned i = locations.size(); i ; --i) {
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unsigned LocNo = i-1;
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@ -999,7 +993,6 @@ void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
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} else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
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// FIXME: Translate SubIdx to a stackslot offset.
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Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
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SpilledLocations.set(LocNo);
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} else {
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Loc.setReg(0);
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Loc.setSubReg(0);
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@ -1033,7 +1026,7 @@ findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx,
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}
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void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
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unsigned LocNo, bool Spilled,
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unsigned LocNo,
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LiveIntervals &LIS,
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const TargetInstrInfo &TII) {
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MachineBasicBlock::iterator I = findInsertLocation(MBB, Idx, LIS);
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@ -1043,35 +1036,25 @@ void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
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assert(cast<DILocalVariable>(Variable)
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->isValidLocationForIntrinsic(getDebugLoc()) &&
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"Expected inlined-at fields to agree");
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// If the location was spilled, the new DBG_VALUE will be indirect. If the
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// original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
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// that the original virtual register was a pointer.
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bool NewIndirect = IsIndirect || Spilled;
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const DIExpression *Expr = Expression;
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if (Spilled && IsIndirect)
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Expr = DIExpression::prepend(Expr, DIExpression::WithDeref);
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MachineInstrBuilder MIB =
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BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
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.add(Loc);
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if (NewIndirect)
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MIB.addImm(0U);
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if (Loc.isReg())
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BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
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IsIndirect, Loc.getReg(), Variable, Expression);
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else
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MIB.addReg(0U, RegState::Debug);
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MIB.addMetadata(Variable).addMetadata(Expr);
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BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
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.add(Loc)
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.addImm(0U)
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.addMetadata(Variable)
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.addMetadata(Expression);
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}
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void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
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const TargetInstrInfo &TII,
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const BitVector &SpilledLocations) {
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const TargetInstrInfo &TII) {
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MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();
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for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
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SlotIndex Start = I.start();
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SlotIndex Stop = I.stop();
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unsigned LocNo = I.value();
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bool Spilled = LocNo != UndefLocNo ? SpilledLocations.test(LocNo) : false;
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// If the interval start was trimmed to the lexical scope insert the
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// DBG_VALUE at the previous index (otherwise it appears after the
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@ -1084,7 +1067,7 @@ void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
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SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
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DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
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insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
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insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
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// This interval may span multiple basic blocks.
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// Insert a DBG_VALUE into each one.
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while(Stop > MBBEnd) {
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break;
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MBBEnd = LIS.getMBBEndIdx(&*MBB);
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DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
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insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
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insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
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}
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DEBUG(dbgs() << '\n');
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if (MBB == MFEnd)
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@ -1109,11 +1092,10 @@ void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
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if (!MF)
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return;
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const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
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BitVector SpilledLocations;
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for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
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DEBUG(userValues[i]->print(dbgs(), TRI));
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userValues[i]->rewriteLocations(*VRM, *TRI, SpilledLocations);
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userValues[i]->emitDebugValues(VRM, *LIS, *TII, SpilledLocations);
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userValues[i]->rewriteLocations(*VRM, *TRI);
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userValues[i]->emitDebugValues(VRM, *LIS, *TII);
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}
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EmitDone = true;
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}
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@ -11,12 +11,12 @@
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; }
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; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
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; CHECK: bb.0.entry:
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; CHECK: DBG_VALUE 23, debug-use _, ![[X]],
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; CHECK: DBG_VALUE 23, 0, ![[X]],
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; CHECK: DBG_VALUE %rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
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; CHECK: bb.1.if.then:
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; CHECK: DBG_VALUE 43, debug-use _, ![[X]],
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; CHECK: DBG_VALUE 43, 0, ![[X]],
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; CHECK: bb.2.if.end:
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; CHECK-NOT: DBG_VALUE 23, debug-use _, ![[X]],
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; CHECK-NOT: DBG_VALUE 23, 0, ![[X]],
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; CHECK: RETQ %eax
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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@ -1,103 +0,0 @@
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; RUN: llc < %s | FileCheck %s
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; RUN: llc -O0 < %s | FileCheck %s
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; Make sure we insert DW_OP_deref when spilling indirect DBG_VALUE instructions.
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; C++ source:
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; #define FORCE_SPILL() \
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; __asm volatile("" : : : \
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; "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "r8", \
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; "r9", "r10", "r11", "r12", "r13", "r14", "r15")
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; struct string {
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; string();
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; string(int i);
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; ~string();
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; int i = 0;
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; };
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; string get_string() {
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; string result = 3;
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; FORCE_SPILL();
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; return result;
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; }
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; CHECK-LABEL: _Z10get_stringv:
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; CHECK: #DEBUG_VALUE: get_string:result <- [%RDI+0]
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; CHECK: movq %rdi, [[OFFS:[0-9]+]](%rsp) # 8-byte Spill
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; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst [[OFFS]], DW_OP_deref] [%RSP+0]
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; CHECK: callq _ZN6stringC1Ei
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; CHECK: #APP
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; CHECK: #NO_APP
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; ModuleID = 't.cpp'
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source_filename = "t.cpp"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64--linux"
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%struct.string = type { i32 }
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; Function Attrs: uwtable
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define void @_Z10get_stringv(%struct.string* noalias sret %agg.result) #0 !dbg !7 {
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entry:
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%nrvo = alloca i1, align 1
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store i1 false, i1* %nrvo, align 1, !dbg !24
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call void @llvm.dbg.declare(metadata %struct.string* %agg.result, metadata !23, metadata !DIExpression()), !dbg !25
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call void @_ZN6stringC1Ei(%struct.string* %agg.result, i32 3), !dbg !26
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call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #3, !dbg !27, !srcloc !28
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store i1 true, i1* %nrvo, align 1, !dbg !29
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%nrvo.val = load i1, i1* %nrvo, align 1, !dbg !30
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br i1 %nrvo.val, label %nrvo.skipdtor, label %nrvo.unused, !dbg !30
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nrvo.unused: ; preds = %entry
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call void @_ZN6stringD1Ev(%struct.string* %agg.result), !dbg !30
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br label %nrvo.skipdtor, !dbg !30
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nrvo.skipdtor: ; preds = %nrvo.unused, %entry
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ret void, !dbg !30
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}
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; Function Attrs: nounwind readnone speculatable
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declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
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declare void @_ZN6stringC1Ei(%struct.string*, i32) unnamed_addr
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declare void @_ZN6stringD1Ev(%struct.string*) unnamed_addr
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attributes #0 = { uwtable }
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attributes #1 = { nounwind readnone speculatable }
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attributes #3 = { nounwind }
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4, !5}
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!llvm.ident = !{!6}
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!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 6.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
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!1 = !DIFile(filename: "t.cpp", directory: "C:\5Csrc\5Cllvm-project\5Cbuild")
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!2 = !{}
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!3 = !{i32 2, !"Dwarf Version", i32 4}
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!4 = !{i32 2, !"Debug Info Version", i32 3}
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!5 = !{i32 1, !"wchar_size", i32 4}
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!6 = !{!"clang version 6.0.0 "}
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!7 = distinct !DISubprogram(name: "get_string", linkageName: "_Z10get_stringv", scope: !1, file: !1, line: 13, type: !8, isLocal: false, isDefinition: true, scopeLine: 13, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !22)
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!8 = !DISubroutineType(types: !9)
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!9 = !{!10}
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!10 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "string", file: !1, line: 7, size: 32, elements: !11, identifier: "_ZTS6string")
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!11 = !{!12, !14, !18, !21}
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!12 = !DIDerivedType(tag: DW_TAG_member, name: "i", scope: !10, file: !1, line: 11, baseType: !13, size: 32)
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!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
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!14 = !DISubprogram(name: "string", scope: !10, file: !1, line: 8, type: !15, isLocal: false, isDefinition: false, scopeLine: 8, flags: DIFlagPrototyped, isOptimized: true)
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!15 = !DISubroutineType(types: !16)
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!16 = !{null, !17}
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!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
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!18 = !DISubprogram(name: "string", scope: !10, file: !1, line: 9, type: !19, isLocal: false, isDefinition: false, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true)
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!19 = !DISubroutineType(types: !20)
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!20 = !{null, !17, !13}
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!21 = !DISubprogram(name: "~string", scope: !10, file: !1, line: 10, type: !15, isLocal: false, isDefinition: false, scopeLine: 10, flags: DIFlagPrototyped, isOptimized: true)
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!22 = !{!23}
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!23 = !DILocalVariable(name: "result", scope: !7, file: !1, line: 14, type: !10)
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!24 = !DILocation(line: 14, column: 3, scope: !7)
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!25 = !DILocation(line: 14, column: 10, scope: !7)
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!26 = !DILocation(line: 14, column: 19, scope: !7)
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!27 = !DILocation(line: 15, column: 3, scope: !7)
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!28 = !{i32 -2147471175}
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!29 = !DILocation(line: 16, column: 3, scope: !7)
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!30 = !DILocation(line: 17, column: 1, scope: !7)
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@ -1,89 +0,0 @@
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; RUN: llc < %s | FileCheck %s
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; Make sure we insert DW_OP_deref when spilling indirect DBG_VALUE instructions.
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; In this example, 'nt' is passed by address because it is not trivially
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; copyable. When we spill the physical argument register at the barrier, we need
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; to insert DW_OP_deref.
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; #define FORCE_SPILL() \
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; __asm volatile("" : : : \
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; "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "r8", \
|
||||
; "r9", "r10", "r11", "r12", "r13", "r14", "r15")
|
||||
; struct NonTrivial {
|
||||
; NonTrivial();
|
||||
; ~NonTrivial();
|
||||
; int i;
|
||||
; };
|
||||
; int foo(NonTrivial nt) {
|
||||
; FORCE_SPILL();
|
||||
; return nt.i;
|
||||
; }
|
||||
|
||||
; CHECK-LABEL: _Z3foo10NonTrivial:
|
||||
; CHECK: #DEBUG_VALUE: foo:nt <- [%RDI+0]
|
||||
; CHECK: movq %rdi, -8(%rsp) # 8-byte Spill
|
||||
; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [%RSP+0]
|
||||
; CHECK: #APP
|
||||
; CHECK: #NO_APP
|
||||
; CHECK: movq -8(%rsp), %rax # 8-byte Reload
|
||||
; CHECK: movl (%rax), %eax
|
||||
|
||||
; ModuleID = 't.cpp'
|
||||
source_filename = "t.cpp"
|
||||
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
|
||||
target triple = "x86_64--linux"
|
||||
|
||||
%struct.NonTrivial = type { i32 }
|
||||
|
||||
; Function Attrs: nounwind uwtable
|
||||
define i32 @_Z3foo10NonTrivial(%struct.NonTrivial* nocapture readonly %nt) local_unnamed_addr #0 !dbg !7 {
|
||||
entry:
|
||||
tail call void @llvm.dbg.declare(metadata %struct.NonTrivial* %nt, metadata !20, metadata !DIExpression()), !dbg !21
|
||||
tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #2, !dbg !22, !srcloc !23
|
||||
%i = getelementptr inbounds %struct.NonTrivial, %struct.NonTrivial* %nt, i64 0, i32 0, !dbg !24
|
||||
%0 = load i32, i32* %i, align 4, !dbg !24, !tbaa !25
|
||||
ret i32 %0, !dbg !30
|
||||
}
|
||||
|
||||
; Function Attrs: nounwind readnone speculatable
|
||||
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
|
||||
|
||||
attributes #0 = { nounwind uwtable }
|
||||
attributes #1 = { nounwind readnone speculatable }
|
||||
attributes #2 = { nounwind }
|
||||
|
||||
!llvm.dbg.cu = !{!0}
|
||||
!llvm.module.flags = !{!3, !4, !5}
|
||||
!llvm.ident = !{!6}
|
||||
|
||||
!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 6.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
|
||||
!1 = !DIFile(filename: "t.cpp", directory: "C:\5Csrc\5Cllvm-project\5Cbuild")
|
||||
!2 = !{}
|
||||
!3 = !{i32 2, !"Dwarf Version", i32 4}
|
||||
!4 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
!5 = !{i32 1, !"wchar_size", i32 4}
|
||||
!6 = !{!"clang version 6.0.0 "}
|
||||
!7 = distinct !DISubprogram(name: "foo", linkageName: "_Z3foo10NonTrivial", scope: !1, file: !1, line: 10, type: !8, isLocal: false, isDefinition: true, scopeLine: 10, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !19)
|
||||
!8 = !DISubroutineType(types: !9)
|
||||
!9 = !{!10, !11}
|
||||
!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
|
||||
!11 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "NonTrivial", file: !1, line: 5, size: 32, elements: !12, identifier: "_ZTS10NonTrivial")
|
||||
!12 = !{!13, !14, !18}
|
||||
!13 = !DIDerivedType(tag: DW_TAG_member, name: "i", scope: !11, file: !1, line: 8, baseType: !10, size: 32)
|
||||
!14 = !DISubprogram(name: "NonTrivial", scope: !11, file: !1, line: 6, type: !15, isLocal: false, isDefinition: false, scopeLine: 6, flags: DIFlagPrototyped, isOptimized: true)
|
||||
!15 = !DISubroutineType(types: !16)
|
||||
!16 = !{null, !17}
|
||||
!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
|
||||
!18 = !DISubprogram(name: "~NonTrivial", scope: !11, file: !1, line: 7, type: !15, isLocal: false, isDefinition: false, scopeLine: 7, flags: DIFlagPrototyped, isOptimized: true)
|
||||
!19 = !{!20}
|
||||
!20 = !DILocalVariable(name: "nt", arg: 1, scope: !7, file: !1, line: 10, type: !11)
|
||||
!21 = !DILocation(line: 10, column: 20, scope: !7)
|
||||
!22 = !DILocation(line: 11, column: 3, scope: !7)
|
||||
!23 = !{i32 -2147471481}
|
||||
!24 = !DILocation(line: 12, column: 13, scope: !7)
|
||||
!25 = !{!26, !27, i64 0}
|
||||
!26 = !{!"_ZTS10NonTrivial", !27, i64 0}
|
||||
!27 = !{!"int", !28, i64 0}
|
||||
!28 = !{!"omnipotent char", !29, i64 0}
|
||||
!29 = !{!"Simple C++ TBAA"}
|
||||
!30 = !DILocation(line: 12, column: 3, scope: !7)
|
Loading…
Reference in New Issue