forked from OSchip/llvm-project
Recommit "[APInt] Add back the asserts that check that the APInt shift methods aren't called with values larger than BitWidth."
This includes a fix to clamp a right shift of larger than BitWidth in DAG combining. llvm-svn: 300816
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@ -847,8 +847,9 @@ public:
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///
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/// \returns *this after shifting left by ShiftAmt
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APInt &operator<<=(unsigned ShiftAmt) {
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assert(ShiftAmt <= BitWidth && "Invalid shift amount");
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if (isSingleWord()) {
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if (ShiftAmt >= BitWidth)
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if (ShiftAmt == BitWidth)
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VAL = 0;
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else
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VAL <<= ShiftAmt;
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@ -893,8 +894,9 @@ public:
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/// Logical right-shift this APInt by ShiftAmt in place.
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void lshrInPlace(unsigned ShiftAmt) {
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assert(ShiftAmt <= BitWidth && "Invalid shift amount");
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if (isSingleWord()) {
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if (ShiftAmt >= BitWidth)
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if (ShiftAmt == BitWidth)
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VAL = 0;
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else
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VAL >>= ShiftAmt;
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@ -861,11 +861,12 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
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InnerOp.getOpcode() == ISD::SRL &&
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InnerOp.hasOneUse() &&
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isa<ConstantSDNode>(InnerOp.getOperand(1))) {
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uint64_t InnerShAmt = cast<ConstantSDNode>(InnerOp.getOperand(1))
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unsigned InnerShAmt = cast<ConstantSDNode>(InnerOp.getOperand(1))
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->getZExtValue();
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if (InnerShAmt < ShAmt &&
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InnerShAmt < InnerBits &&
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NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 &&
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NewMask.lshr(std::min(InnerBits - InnerShAmt + ShAmt,
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BitWidth)) == 0 &&
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NewMask.trunc(ShAmt) == 0) {
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SDValue NewSA =
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TLO.DAG.getConstant(ShAmt - InnerShAmt, dl,
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@ -2021,7 +2021,7 @@ TEST(APIntTest, LogicalRightShift) {
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// Ensure we handle large shifts of multi-word.
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const APInt neg_one(128, static_cast<uint64_t>(-1), true);
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EXPECT_EQ(0, neg_one.lshr(257));
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EXPECT_EQ(0, neg_one.lshr(128));
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}
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TEST(APIntTest, LeftShift) {
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@ -2054,7 +2054,7 @@ TEST(APIntTest, LeftShift) {
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// Ensure we handle large shifts of multi-word.
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const APInt neg_one(128, static_cast<uint64_t>(-1), true);
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EXPECT_EQ(0, neg_one.shl(257));
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EXPECT_EQ(0, neg_one.shl(128));
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}
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} // end anonymous namespace
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