Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.

llvm-svn: 134457
This commit is contained in:
Evan Cheng 2011-07-06 02:02:33 +00:00
parent 9de1978f6e
commit 4d806e2830
3 changed files with 6 additions and 151 deletions

View File

@ -33,9 +33,6 @@ using namespace llvm;
X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI) X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
: MCInstPrinter(MAI) { : MCInstPrinter(MAI) {
// Initialize the set of available features.
setAvailableFeatures(ComputeAvailableFeatures(
&TM.getSubtarget<X86Subtarget>()));
} }
void X86ATTInstPrinter::printRegName(raw_ostream &OS, void X86ATTInstPrinter::printRegName(raw_ostream &OS,

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@ -30,8 +30,6 @@ public:
virtual void printInst(const MCInst *MI, raw_ostream &OS); virtual void printInst(const MCInst *MI, raw_ostream &OS);
virtual StringRef getOpcodeName(unsigned Opcode) const; virtual StringRef getOpcodeName(unsigned Opcode) const;
// Methods used to print the alias of an instruction.
unsigned ComputeAvailableFeatures(const X86Subtarget *Subtarget) const;
// Autogenerated by tblgen, returns true if we successfully printed an // Autogenerated by tblgen, returns true if we successfully printed an
// alias. // alias.
bool printAliasInstr(const MCInst *MI, raw_ostream &OS); bool printAliasInstr(const MCInst *MI, raw_ostream &OS);

View File

@ -606,92 +606,29 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
} }
namespace { namespace {
/// SubtargetFeatureInfo - Helper class for storing information on a subtarget
/// feature which participates in instruction matching.
struct SubtargetFeatureInfo {
/// \brief The predicate record for this feature.
const Record *TheDef;
/// \brief An unique index assigned to represent this feature.
unsigned Index;
SubtargetFeatureInfo(const Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
/// \brief The name of the enumerated constant identifying this feature.
std::string getEnumName() const {
return "Feature_" + TheDef->getName();
}
};
struct AsmWriterInfo {
/// Map of Predicate records to their subtarget information.
std::map<const Record*, SubtargetFeatureInfo*> SubtargetFeatures;
/// getSubtargetFeature - Lookup or create the subtarget feature info for the
/// given operand.
SubtargetFeatureInfo *getSubtargetFeature(const Record *Def) const {
assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
std::map<const Record*, SubtargetFeatureInfo*>::const_iterator I =
SubtargetFeatures.find(Def);
return I == SubtargetFeatures.end() ? 0 : I->second;
}
void addReqFeatures(const std::vector<Record*> &Features) {
for (std::vector<Record*>::const_iterator
I = Features.begin(), E = Features.end(); I != E; ++I) {
const Record *Pred = *I;
// Ignore predicates that are not intended for the assembler.
if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
continue;
if (Pred->getName().empty())
throw TGError(Pred->getLoc(), "Predicate has no name!");
// Don't add the predicate again.
if (getSubtargetFeature(Pred))
continue;
unsigned FeatureNo = SubtargetFeatures.size();
SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
assert(FeatureNo < 32 && "Too many subtarget features!");
}
}
const SubtargetFeatureInfo *getFeatureInfo(const Record *R) {
return SubtargetFeatures[R];
}
};
// IAPrinter - Holds information about an InstAlias. Two InstAliases match if // IAPrinter - Holds information about an InstAlias. Two InstAliases match if
// they both have the same conditionals. In which case, we cannot print out the // they both have the same conditionals. In which case, we cannot print out the
// alias for that pattern. // alias for that pattern.
class IAPrinter { class IAPrinter {
AsmWriterInfo &AWI;
std::vector<std::string> Conds; std::vector<std::string> Conds;
std::map<StringRef, unsigned> OpMap; std::map<StringRef, unsigned> OpMap;
std::string Result; std::string Result;
std::string AsmString; std::string AsmString;
std::vector<Record*> ReqFeatures; std::vector<Record*> ReqFeatures;
public: public:
IAPrinter(AsmWriterInfo &Info, std::string R, std::string AS) IAPrinter(std::string R, std::string AS)
: AWI(Info), Result(R), AsmString(AS) {} : Result(R), AsmString(AS) {}
void addCond(const std::string &C) { Conds.push_back(C); } void addCond(const std::string &C) { Conds.push_back(C); }
void addReqFeatures(const std::vector<Record*> &Features) {
AWI.addReqFeatures(Features);
ReqFeatures = Features;
}
void addOperand(StringRef Op, unsigned Idx) { OpMap[Op] = Idx; } void addOperand(StringRef Op, unsigned Idx) { OpMap[Op] = Idx; }
unsigned getOpIndex(StringRef Op) { return OpMap[Op]; } unsigned getOpIndex(StringRef Op) { return OpMap[Op]; }
bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); } bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); }
bool print(raw_ostream &O) { void print(raw_ostream &O) {
if (Conds.empty() && ReqFeatures.empty()) { if (Conds.empty() && ReqFeatures.empty()) {
O.indent(6) << "return true;\n"; O.indent(6) << "return true;\n";
return false; return;
} }
O << "if ("; O << "if (";
@ -706,27 +643,6 @@ public:
O << *I; O << *I;
} }
if (!ReqFeatures.empty()) {
if (Conds.begin() != Conds.end()) {
O << " &&\n";
O.indent(8);
} else {
O << "if (";
}
std::string Req;
raw_string_ostream ReqO(Req);
for (std::vector<Record*>::iterator
I = ReqFeatures.begin(), E = ReqFeatures.end(); I != E; ++I) {
if (I != ReqFeatures.begin()) ReqO << " | ";
ReqO << AWI.getFeatureInfo(*I)->getEnumName();
}
O << "(AvailableFeatures & (" << ReqO.str() << ")) == ("
<< ReqO.str() << ')';
}
O << ") {\n"; O << ") {\n";
O.indent(6) << "// " << Result << "\n"; O.indent(6) << "// " << Result << "\n";
O.indent(6) << "AsmString = \"" << AsmString << "\";\n"; O.indent(6) << "AsmString = \"" << AsmString << "\";\n";
@ -738,7 +654,6 @@ public:
O.indent(6) << "break;\n"; O.indent(6) << "break;\n";
O.indent(4) << '}'; O.indent(4) << '}';
return !ReqFeatures.empty();
} }
bool operator==(const IAPrinter &RHS) { bool operator==(const IAPrinter &RHS) {
@ -770,53 +685,6 @@ public:
} // end anonymous namespace } // end anonymous namespace
/// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
/// definitions.
static void EmitSubtargetFeatureFlagEnumeration(AsmWriterInfo &Info,
raw_ostream &O) {
O << "namespace {\n\n";
O << "// Flags for subtarget features that participate in "
<< "alias instruction matching.\n";
O << "enum SubtargetFeatureFlag {\n";
for (std::map<const Record*, SubtargetFeatureInfo*>::const_iterator
I = Info.SubtargetFeatures.begin(),
E = Info.SubtargetFeatures.end(); I != E; ++I) {
SubtargetFeatureInfo &SFI = *I->second;
O << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
}
O << " Feature_None = 0\n";
O << "};\n\n";
O << "} // end anonymous namespace\n\n";
}
/// EmitComputeAvailableFeatures - Emit the function to compute the list of
/// available features given a subtarget.
static void EmitComputeAvailableFeatures(AsmWriterInfo &Info,
Record *AsmWriter,
CodeGenTarget &Target,
raw_ostream &O) {
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
O << "unsigned " << Target.getName() << ClassName << "::\n"
<< "ComputeAvailableFeatures(const " << Target.getName()
<< "Subtarget *Subtarget) const {\n";
O << " unsigned Features = 0;\n";
for (std::map<const Record*, SubtargetFeatureInfo*>::const_iterator
I = Info.SubtargetFeatures.begin(),
E = Info.SubtargetFeatures.end(); I != E; ++I) {
SubtargetFeatureInfo &SFI = *I->second;
O << " if (" << SFI.TheDef->getValueAsString("CondString")
<< ")\n";
O << " Features |= " << SFI.getEnumName() << ";\n";
}
O << " return Features;\n";
O << "}\n\n";
}
static void EmitGetMapOperandNumber(raw_ostream &O) { static void EmitGetMapOperandNumber(raw_ostream &O) {
O << "static unsigned getMapOperandNumber(" O << "static unsigned getMapOperandNumber("
<< "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n"; << "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n";
@ -960,7 +828,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
// A map of which conditions need to be met for each instruction operand // A map of which conditions need to be met for each instruction operand
// before it can be matched to the mnemonic. // before it can be matched to the mnemonic.
std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap; std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
AsmWriterInfo AWI;
for (std::map<std::string, std::vector<CodeGenInstAlias*> >::iterator for (std::map<std::string, std::vector<CodeGenInstAlias*> >::iterator
I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) { I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) {
@ -977,9 +844,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
if (NumResultOps < CountNumOperands(CGA->AsmString)) if (NumResultOps < CountNumOperands(CGA->AsmString))
continue; continue;
IAPrinter *IAP = new IAPrinter(AWI, CGA->Result->getAsString(), IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
CGA->AsmString); CGA->AsmString);
IAP->addReqFeatures(CGA->TheDef->getValueAsListOfDefs("Predicates"));
std::string Cond; std::string Cond;
Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo); Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
@ -1049,9 +915,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
} }
} }
EmitSubtargetFeatureFlagEnumeration(AWI, O);
EmitComputeAvailableFeatures(AWI, AsmWriter, Target, O);
std::string Header; std::string Header;
raw_string_ostream HeaderO(Header); raw_string_ostream HeaderO(Header);
@ -1061,7 +924,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
std::string Cases; std::string Cases;
raw_string_ostream CasesO(Cases); raw_string_ostream CasesO(Cases);
bool NeedAvailableFeatures = false;
for (std::map<std::string, std::vector<IAPrinter*> >::iterator for (std::map<std::string, std::vector<IAPrinter*> >::iterator
I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) { I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
@ -1092,7 +954,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) { II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
IAPrinter *IAP = *II; IAPrinter *IAP = *II;
CasesO.indent(4); CasesO.indent(4);
NeedAvailableFeatures |= IAP->print(CasesO); IAP->print(CasesO);
CasesO << '\n'; CasesO << '\n';
} }
@ -1112,8 +974,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
O << HeaderO.str(); O << HeaderO.str();
O.indent(2) << "StringRef AsmString;\n"; O.indent(2) << "StringRef AsmString;\n";
O.indent(2) << "SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;\n"; O.indent(2) << "SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;\n";
if (NeedAvailableFeatures)
O.indent(2) << "unsigned AvailableFeatures = getAvailableFeatures();\n\n";
O.indent(2) << "switch (MI->getOpcode()) {\n"; O.indent(2) << "switch (MI->getOpcode()) {\n";
O.indent(2) << "default: return false;\n"; O.indent(2) << "default: return false;\n";
O << CasesO.str(); O << CasesO.str();