forked from OSchip/llvm-project
Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo.
llvm-svn: 134457
This commit is contained in:
parent
9de1978f6e
commit
4d806e2830
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@ -33,9 +33,6 @@ using namespace llvm;
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X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
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X86ATTInstPrinter::X86ATTInstPrinter(TargetMachine &TM, const MCAsmInfo &MAI)
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: MCInstPrinter(MAI) {
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: MCInstPrinter(MAI) {
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// Initialize the set of available features.
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setAvailableFeatures(ComputeAvailableFeatures(
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&TM.getSubtarget<X86Subtarget>()));
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}
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}
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void X86ATTInstPrinter::printRegName(raw_ostream &OS,
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void X86ATTInstPrinter::printRegName(raw_ostream &OS,
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@ -30,8 +30,6 @@ public:
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virtual void printInst(const MCInst *MI, raw_ostream &OS);
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virtual void printInst(const MCInst *MI, raw_ostream &OS);
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virtual StringRef getOpcodeName(unsigned Opcode) const;
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virtual StringRef getOpcodeName(unsigned Opcode) const;
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// Methods used to print the alias of an instruction.
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unsigned ComputeAvailableFeatures(const X86Subtarget *Subtarget) const;
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// Autogenerated by tblgen, returns true if we successfully printed an
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// Autogenerated by tblgen, returns true if we successfully printed an
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// alias.
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// alias.
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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bool printAliasInstr(const MCInst *MI, raw_ostream &OS);
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@ -606,92 +606,29 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) {
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}
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}
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namespace {
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namespace {
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/// SubtargetFeatureInfo - Helper class for storing information on a subtarget
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/// feature which participates in instruction matching.
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struct SubtargetFeatureInfo {
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/// \brief The predicate record for this feature.
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const Record *TheDef;
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/// \brief An unique index assigned to represent this feature.
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unsigned Index;
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SubtargetFeatureInfo(const Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
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/// \brief The name of the enumerated constant identifying this feature.
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std::string getEnumName() const {
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return "Feature_" + TheDef->getName();
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}
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};
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struct AsmWriterInfo {
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/// Map of Predicate records to their subtarget information.
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std::map<const Record*, SubtargetFeatureInfo*> SubtargetFeatures;
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/// getSubtargetFeature - Lookup or create the subtarget feature info for the
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/// given operand.
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SubtargetFeatureInfo *getSubtargetFeature(const Record *Def) const {
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assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
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std::map<const Record*, SubtargetFeatureInfo*>::const_iterator I =
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SubtargetFeatures.find(Def);
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return I == SubtargetFeatures.end() ? 0 : I->second;
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}
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void addReqFeatures(const std::vector<Record*> &Features) {
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for (std::vector<Record*>::const_iterator
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I = Features.begin(), E = Features.end(); I != E; ++I) {
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const Record *Pred = *I;
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// Ignore predicates that are not intended for the assembler.
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if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
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continue;
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if (Pred->getName().empty())
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throw TGError(Pred->getLoc(), "Predicate has no name!");
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// Don't add the predicate again.
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if (getSubtargetFeature(Pred))
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continue;
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unsigned FeatureNo = SubtargetFeatures.size();
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SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
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assert(FeatureNo < 32 && "Too many subtarget features!");
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}
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}
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const SubtargetFeatureInfo *getFeatureInfo(const Record *R) {
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return SubtargetFeatures[R];
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}
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};
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// IAPrinter - Holds information about an InstAlias. Two InstAliases match if
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// IAPrinter - Holds information about an InstAlias. Two InstAliases match if
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// they both have the same conditionals. In which case, we cannot print out the
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// they both have the same conditionals. In which case, we cannot print out the
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// alias for that pattern.
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// alias for that pattern.
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class IAPrinter {
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class IAPrinter {
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AsmWriterInfo &AWI;
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std::vector<std::string> Conds;
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std::vector<std::string> Conds;
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std::map<StringRef, unsigned> OpMap;
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std::map<StringRef, unsigned> OpMap;
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std::string Result;
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std::string Result;
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std::string AsmString;
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std::string AsmString;
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std::vector<Record*> ReqFeatures;
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std::vector<Record*> ReqFeatures;
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public:
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public:
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IAPrinter(AsmWriterInfo &Info, std::string R, std::string AS)
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IAPrinter(std::string R, std::string AS)
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: AWI(Info), Result(R), AsmString(AS) {}
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: Result(R), AsmString(AS) {}
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void addCond(const std::string &C) { Conds.push_back(C); }
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void addCond(const std::string &C) { Conds.push_back(C); }
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void addReqFeatures(const std::vector<Record*> &Features) {
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AWI.addReqFeatures(Features);
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ReqFeatures = Features;
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}
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void addOperand(StringRef Op, unsigned Idx) { OpMap[Op] = Idx; }
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void addOperand(StringRef Op, unsigned Idx) { OpMap[Op] = Idx; }
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unsigned getOpIndex(StringRef Op) { return OpMap[Op]; }
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unsigned getOpIndex(StringRef Op) { return OpMap[Op]; }
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bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); }
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bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); }
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bool print(raw_ostream &O) {
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void print(raw_ostream &O) {
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if (Conds.empty() && ReqFeatures.empty()) {
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if (Conds.empty() && ReqFeatures.empty()) {
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O.indent(6) << "return true;\n";
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O.indent(6) << "return true;\n";
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return false;
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return;
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}
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}
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O << "if (";
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O << "if (";
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@ -706,27 +643,6 @@ public:
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O << *I;
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O << *I;
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}
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}
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if (!ReqFeatures.empty()) {
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if (Conds.begin() != Conds.end()) {
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O << " &&\n";
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O.indent(8);
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} else {
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O << "if (";
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}
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std::string Req;
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raw_string_ostream ReqO(Req);
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for (std::vector<Record*>::iterator
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I = ReqFeatures.begin(), E = ReqFeatures.end(); I != E; ++I) {
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if (I != ReqFeatures.begin()) ReqO << " | ";
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ReqO << AWI.getFeatureInfo(*I)->getEnumName();
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}
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O << "(AvailableFeatures & (" << ReqO.str() << ")) == ("
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<< ReqO.str() << ')';
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}
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O << ") {\n";
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O << ") {\n";
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O.indent(6) << "// " << Result << "\n";
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O.indent(6) << "// " << Result << "\n";
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O.indent(6) << "AsmString = \"" << AsmString << "\";\n";
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O.indent(6) << "AsmString = \"" << AsmString << "\";\n";
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@ -738,7 +654,6 @@ public:
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O.indent(6) << "break;\n";
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O.indent(6) << "break;\n";
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O.indent(4) << '}';
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O.indent(4) << '}';
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return !ReqFeatures.empty();
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}
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}
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bool operator==(const IAPrinter &RHS) {
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bool operator==(const IAPrinter &RHS) {
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@ -770,53 +685,6 @@ public:
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} // end anonymous namespace
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} // end anonymous namespace
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/// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
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/// definitions.
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static void EmitSubtargetFeatureFlagEnumeration(AsmWriterInfo &Info,
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raw_ostream &O) {
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O << "namespace {\n\n";
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O << "// Flags for subtarget features that participate in "
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<< "alias instruction matching.\n";
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O << "enum SubtargetFeatureFlag {\n";
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for (std::map<const Record*, SubtargetFeatureInfo*>::const_iterator
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I = Info.SubtargetFeatures.begin(),
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E = Info.SubtargetFeatures.end(); I != E; ++I) {
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SubtargetFeatureInfo &SFI = *I->second;
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O << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
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}
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O << " Feature_None = 0\n";
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O << "};\n\n";
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O << "} // end anonymous namespace\n\n";
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}
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/// EmitComputeAvailableFeatures - Emit the function to compute the list of
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/// available features given a subtarget.
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static void EmitComputeAvailableFeatures(AsmWriterInfo &Info,
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Record *AsmWriter,
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CodeGenTarget &Target,
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raw_ostream &O) {
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std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
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O << "unsigned " << Target.getName() << ClassName << "::\n"
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<< "ComputeAvailableFeatures(const " << Target.getName()
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<< "Subtarget *Subtarget) const {\n";
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O << " unsigned Features = 0;\n";
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for (std::map<const Record*, SubtargetFeatureInfo*>::const_iterator
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I = Info.SubtargetFeatures.begin(),
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E = Info.SubtargetFeatures.end(); I != E; ++I) {
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SubtargetFeatureInfo &SFI = *I->second;
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O << " if (" << SFI.TheDef->getValueAsString("CondString")
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<< ")\n";
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O << " Features |= " << SFI.getEnumName() << ";\n";
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}
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O << " return Features;\n";
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O << "}\n\n";
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}
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static void EmitGetMapOperandNumber(raw_ostream &O) {
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static void EmitGetMapOperandNumber(raw_ostream &O) {
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O << "static unsigned getMapOperandNumber("
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O << "static unsigned getMapOperandNumber("
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<< "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n";
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<< "const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,\n";
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@ -960,7 +828,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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// A map of which conditions need to be met for each instruction operand
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// A map of which conditions need to be met for each instruction operand
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// before it can be matched to the mnemonic.
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// before it can be matched to the mnemonic.
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std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
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std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
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AsmWriterInfo AWI;
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for (std::map<std::string, std::vector<CodeGenInstAlias*> >::iterator
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for (std::map<std::string, std::vector<CodeGenInstAlias*> >::iterator
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I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) {
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I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) {
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@ -977,9 +844,8 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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if (NumResultOps < CountNumOperands(CGA->AsmString))
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if (NumResultOps < CountNumOperands(CGA->AsmString))
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continue;
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continue;
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IAPrinter *IAP = new IAPrinter(AWI, CGA->Result->getAsString(),
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IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
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CGA->AsmString);
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CGA->AsmString);
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IAP->addReqFeatures(CGA->TheDef->getValueAsListOfDefs("Predicates"));
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std::string Cond;
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std::string Cond;
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Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
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Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
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@ -1049,9 +915,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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}
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}
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}
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}
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EmitSubtargetFeatureFlagEnumeration(AWI, O);
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EmitComputeAvailableFeatures(AWI, AsmWriter, Target, O);
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std::string Header;
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std::string Header;
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raw_string_ostream HeaderO(Header);
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raw_string_ostream HeaderO(Header);
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std::string Cases;
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std::string Cases;
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raw_string_ostream CasesO(Cases);
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raw_string_ostream CasesO(Cases);
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bool NeedAvailableFeatures = false;
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for (std::map<std::string, std::vector<IAPrinter*> >::iterator
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for (std::map<std::string, std::vector<IAPrinter*> >::iterator
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I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
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I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
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II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
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II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
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IAPrinter *IAP = *II;
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IAPrinter *IAP = *II;
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CasesO.indent(4);
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CasesO.indent(4);
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NeedAvailableFeatures |= IAP->print(CasesO);
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IAP->print(CasesO);
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CasesO << '\n';
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CasesO << '\n';
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}
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}
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@ -1112,8 +974,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
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O << HeaderO.str();
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O << HeaderO.str();
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O.indent(2) << "StringRef AsmString;\n";
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O.indent(2) << "StringRef AsmString;\n";
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O.indent(2) << "SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;\n";
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O.indent(2) << "SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;\n";
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if (NeedAvailableFeatures)
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O.indent(2) << "unsigned AvailableFeatures = getAvailableFeatures();\n\n";
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O.indent(2) << "switch (MI->getOpcode()) {\n";
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O.indent(2) << "switch (MI->getOpcode()) {\n";
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O.indent(2) << "default: return false;\n";
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O.indent(2) << "default: return false;\n";
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O << CasesO.str();
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O << CasesO.str();
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