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[AVX-512] Replace masked 128/256-bit pavg builtins and replace with select and older unmasked builtins. 

llvm-svn: 284929
This commit is contained in:
Craig Topper 2016-10-22 21:24:56 +00:00
parent 622c63614d
commit 4d63dfc286
3 changed files with 48 additions and 56 deletions
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4
clang/include/clang/Basic/BuiltinsX86.def
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@ -1128,10 +1128,6 @@ TARGET_BUILTIN(__builtin_ia32_packusdw128_mask, "V8sV4iV4iV8sUc", "", "avx512vl,
TARGET_BUILTIN(__builtin_ia32_packusdw256_mask, "V16sV8iV8iV16sUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_packuswb128_mask, "V16cV8sV8sV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_packuswb256_mask, "V32cV16sV16sV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pavgb128_mask, "V16cV16cV16cV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pavgb256_mask, "V32cV32cV32cV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pavgw128_mask, "V8sV8sV8sV8sUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pavgw256_mask, "V16sV16sV16sV16sUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaxsb128_mask, "V16cV16cV16cV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaxsb256_mask, "V32cV32cV32cV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pmaxsw128_mask, "V8sV8sV8sV8sUc", "", "avx512vl,avx512bw")

76
clang/lib/Headers/avx512vlbwintrin.h
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@ -1127,79 +1127,67 @@ _mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B)
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_avg_epu8 (__m128i __W, __mmask16 __U, __m128i __A,
__m128i __B)
_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pavgb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi) __W,
(__mmask16) __U);
return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
(__v16qi)_mm_avg_epu8(__A, __B),
(__v16qi)__W);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_avg_epu8 (__mmask16 __U, __m128i __A, __m128i __B)
_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pavgb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi) _mm_setzero_si128 (),
(__mmask16) __U);
return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
(__v16qi)_mm_avg_epu8(__A, __B),
(__v16qi)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_avg_epu8 (__m256i __W, __mmask32 __U, __m256i __A,
__m256i __B)
_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pavgb256_mask ((__v32qi) __A,
(__v32qi) __B,
(__v32qi) __W,
(__mmask32) __U);
return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
(__v32qi)_mm256_avg_epu8(__A, __B),
(__v32qi)__W);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_avg_epu8 (__mmask32 __U, __m256i __A, __m256i __B)
_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pavgb256_mask ((__v32qi) __A,
(__v32qi) __B,
(__v32qi) _mm256_setzero_si256 (),
(__mmask32) __U);
return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
(__v32qi)_mm256_avg_epu8(__A, __B),
(__v32qi)_mm256_setzero_si256());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_avg_epu16 (__m128i __W, __mmask8 __U, __m128i __A,
__m128i __B)
_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pavgw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi) __W,
(__mmask8) __U);
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
(__v8hi)_mm_avg_epu16(__A, __B),
(__v8hi)__W);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_avg_epu16 (__mmask8 __U, __m128i __A, __m128i __B)
_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pavgw128_mask ((__v8hi) __A,
(__v8hi) __B,
(__v8hi) _mm_setzero_si128 (),
(__mmask8) __U);
return (__m128i)__builtin_ia32_selectw_128((__mmask8)__U,
(__v8hi)_mm_avg_epu16(__A, __B),
(__v8hi)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_avg_epu16 (__m256i __W, __mmask16 __U, __m256i __A,
__m256i __B)
_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pavgw256_mask ((__v16hi) __A,
(__v16hi) __B,
(__v16hi) __W,
(__mmask16) __U);
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
(__v16hi)_mm256_avg_epu16(__A, __B),
(__v16hi)__W);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_avg_epu16 (__mmask16 __U, __m256i __A, __m256i __B)
_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pavgw256_mask ((__v16hi) __A,
(__v16hi) __B,
(__v16hi) _mm256_setzero_si256 (),
(__mmask16) __U);
return (__m256i)__builtin_ia32_selectw_256((__mmask16)__U,
(__v16hi)_mm256_avg_epu16(__A, __B),
(__v16hi)_mm256_setzero_si256());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS

24
clang/test/CodeGen/avx512vlbw-builtins.c
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@ -1139,42 +1139,50 @@ __m256i test_mm256_maskz_adds_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
}
__m128i test_mm_mask_avg_epu8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_avg_epu8
// CHECK: @llvm.x86.avx512.mask.pavg.b.128
// CHECK: @llvm.x86.sse2.pavg.b
// CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_mask_avg_epu8(__W,__U,__A,__B);
}
__m128i test_mm_maskz_avg_epu8(__mmask16 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_avg_epu8
// CHECK: @llvm.x86.avx512.mask.pavg.b.128
// CHECK: @llvm.x86.sse2.pavg.b
// CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_maskz_avg_epu8(__U,__A,__B);
}
__m256i test_mm256_mask_avg_epu8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_avg_epu8
// CHECK: @llvm.x86.avx512.mask.pavg.b.256
// CHECK: @llvm.x86.avx2.pavg.b
// CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_mask_avg_epu8(__W,__U,__A,__B);
}
__m256i test_mm256_maskz_avg_epu8(__mmask32 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_avg_epu8
// CHECK: @llvm.x86.avx512.mask.pavg.b.256
// CHECK: @llvm.x86.avx2.pavg.b
// CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_maskz_avg_epu8(__U,__A,__B);
}
__m128i test_mm_mask_avg_epu16(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_avg_epu16
// CHECK: @llvm.x86.avx512.mask.pavg.w.128
// CHECK: @llvm.x86.sse2.pavg.w
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_mask_avg_epu16(__W,__U,__A,__B);
}
__m128i test_mm_maskz_avg_epu16(__mmask8 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_avg_epu16
// CHECK: @llvm.x86.avx512.mask.pavg.w.128
// CHECK: @llvm.x86.sse2.pavg.w
// CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
return _mm_maskz_avg_epu16(__U,__A,__B);
}
__m256i test_mm256_mask_avg_epu16(__m256i __W, __mmask16 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_avg_epu16
// CHECK: @llvm.x86.avx512.mask.pavg.w.256
// CHECK: @llvm.x86.avx2.pavg.w
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_mask_avg_epu16(__W,__U,__A,__B);
}
__m256i test_mm256_maskz_avg_epu16(__mmask16 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_avg_epu16
// CHECK: @llvm.x86.avx512.mask.pavg.w.256
// CHECK: @llvm.x86.avx2.pavg.w
// CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
return _mm256_maskz_avg_epu16(__U,__A,__B);
}
__m128i test_mm_maskz_max_epi8(__mmask16 __M, __m128i __A, __m128i __B) {