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ARM: Implement __builtin_arm_nop intrinsic 

This patch implements __builtin_arm_nop intrinsic for AArch32 and AArch64,
which generates hint 0x0, the alias of NOP instruction.

This intrinsic is necessary to implement ACLE __nop intrinsic.

Differential Revision: http://reviews.llvm.org/D4495

llvm-svn: 212947
This commit is contained in:
Yi Kong 2014-07-14 15:20:09 +00:00
parent 41ffa5d1ba
commit 4d5e23f53a
5 changed files with 15 additions and 0 deletions
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1
clang/include/clang/Basic/BuiltinsAArch64.def
View File

@ -28,6 +28,7 @@ BUILTIN(__builtin_arm_rbit, "UiUi", "nc")
BUILTIN(__builtin_arm_rbit64, "LUiLUi", "nc")
// HINT
BUILTIN(__builtin_arm_nop, "v", "")
BUILTIN(__builtin_arm_yield, "v", "")
BUILTIN(__builtin_arm_wfe, "v", "")
BUILTIN(__builtin_arm_wfi, "v", "")

1
clang/include/clang/Basic/BuiltinsARM.def
View File

@ -68,6 +68,7 @@ BUILTIN(__builtin_arm_crc32d, "UiUiLLUi", "nc")
BUILTIN(__builtin_arm_crc32cd, "UiUiLLUi", "nc")
// HINT
BUILTIN(__builtin_arm_nop, "v", "")
BUILTIN(__builtin_arm_yield, "v", "")
BUILTIN(__builtin_arm_wfe, "v", "")
BUILTIN(__builtin_arm_wfi, "v", "")

6
clang/lib/CodeGen/CGBuiltin.cpp
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@ -3040,6 +3040,9 @@ Value *CodeGenFunction::EmitARMBuiltinExpr(unsigned BuiltinID,
unsigned HintID = static_cast<unsigned>(-1);
switch (BuiltinID) {
default: break;
case ARM::BI__builtin_arm_nop:
HintID = 0;
break;
case ARM::BI__builtin_arm_yield:
case ARM::BI__yield:
HintID = 1;
@ -3804,6 +3807,9 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
unsigned HintID = static_cast<unsigned>(-1);
switch (BuiltinID) {
default: break;
case AArch64::BI__builtin_arm_nop:
HintID = 0;
break;
case AArch64::BI__builtin_arm_yield:
HintID = 1;
break;

6
clang/test/CodeGen/builtins-arm.c
View File

@ -19,6 +19,12 @@ void test_eh_return_data_regno()
res = __builtin_eh_return_data_regno(1); // CHECK: store volatile i32 1
}
void nop() {
__builtin_arm_nop();
}
// CHECK: call {{.*}} @llvm.arm.hint(i32 0)
void yield() {
__builtin_arm_yield();
}

1
clang/test/CodeGen/builtins-arm64.c
View File

@ -16,6 +16,7 @@ unsigned long long rbit64(unsigned long long a) {
}
void hints() {
__builtin_arm_nop(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0)
__builtin_arm_yield(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1)
__builtin_arm_wfe(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2)
__builtin_arm_wfi(); //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3)