forked from OSchip/llvm-project
Revert r273313 "[NVPTX] Improve lowering of byval args of device functions."
The change causes llvm crash in some unoptimized builds. llvm-svn: 274163
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@ -662,58 +662,6 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
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TM.is64Bit() ? NVPTX::cvta_to_local_yes_64 : NVPTX::cvta_to_local_yes;
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break;
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case ADDRESS_SPACE_PARAM:
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if (Src.getOpcode() == NVPTXISD::MoveParam) {
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// TL;DR: addrspacecast MoveParam to param space is a no-op.
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//
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// Longer version is that this particular change is both an
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// optimization and a work-around for a problem in ptxas for
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// sm_50+.
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//
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// Background:
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// According to PTX ISA v7.5 5.1.6.4: "...whenever a formal
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// parameter has its address taken within the called function
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// [..] the parameter will be copied to the stack if
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// necessary, and so the address will be in the .local state
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// space and is accessed via ld.local and st.local
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// instructions."
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//
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// Bug part: 'copied to the stack if necessary' part is
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// currently broken for byval arguments with alignment < 4 for
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// sm_50+ in all public versions of CUDA. Taking the address of
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// such an argument results in SASS code that attempts to store
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// the value using a 32-bit write to an unaligned address.
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//
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// Optimization: On top of the overhead of spill-to-stack, we
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// also convert that address from local to generic space,
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// which may result in further overhead. All of it is in most
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// cases unnecessary, as we only need the value of the
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// variable, and it can be accessed directly by using the
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// argument symbol. We'll use the address of the local copy if
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// it's needed (see step (a) below).
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//
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// In order for this bit to do its job we need to:
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//
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// a) Let LLVM do the spilling and make sure the IR does not
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// access byval arguments directly. Instead, the argument
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// pointer (which is in the default address space) is
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// addrspacecast'ed to param space, and the data it points to
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// is copied to allocated local space (i.e. we let compiler
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// spill it, which gives us an opportunity to optimize the
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// spill away later if nobody needs its address). Then all
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// uses of arg pointer are replaced with a pointer to local
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// copy of the arg. All this is done in NVPTXLowerKernelArgs.
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//
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// b) LowerFormalArguments() lowers the argument to
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// NVPTXISD::MoveParam without any space conversion.
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//
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// c) And the final step is done by the code below.
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// It replaces the addrspacecast (MoveParam) from step (a)
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// with the arg symbol itself. This can then be used for
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// [symbol + offset] addressing.
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ReplaceNode(N, Src.getOperand(0).getNode());
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return;
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}
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Opc = TM.is64Bit() ? NVPTX::nvvm_ptr_gen_to_param_64
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: NVPTX::nvvm_ptr_gen_to_param;
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break;
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@ -2078,6 +2078,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
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SDValue Root = DAG.getRoot();
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std::vector<SDValue> OutChains;
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bool isKernel = llvm::isKernelFunction(*F);
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bool isABI = (STI.getSmVersion() >= 20);
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assert(isABI && "Non-ABI compilation is not supported");
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if (!isABI)
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@ -2111,8 +2112,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
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theArgs[i],
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(theArgs[i]->getParent() ? theArgs[i]->getParent()->getParent()
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: nullptr))) {
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assert(llvm::isKernelFunction(*F) &&
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"Only kernels can have image/sampler params");
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assert(isKernel && "Only kernels can have image/sampler params");
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InVals.push_back(DAG.getConstant(i + 1, dl, MVT::i32));
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continue;
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}
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@ -2334,11 +2334,6 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
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// machine instruction fails because TargetExternalSymbol
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// (not lowered) is target dependent, and CopyToReg assumes
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// the source is lowered.
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//
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// Byval arguments for regular function are lowered the same way
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// as for kernels in order to generate better code and work around
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// a known issue in ptxas. See comments in
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// NVPTXDAGToDAGISel::SelectAddrSpaceCast() for the gory details.
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EVT ObjectVT = getValueType(DL, Ty);
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assert(ObjectVT == Ins[InsIdx].VT &&
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"Ins type did not match function type");
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@ -2346,7 +2341,14 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
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SDValue p = DAG.getNode(NVPTXISD::MoveParam, dl, ObjectVT, Arg);
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if (p.getNode())
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p.getNode()->setIROrder(idx + 1);
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InVals.push_back(p);
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if (isKernel)
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InVals.push_back(p);
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else {
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SDValue p2 = DAG.getNode(
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ISD::INTRINSIC_WO_CHAIN, dl, ObjectVT,
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DAG.getConstant(Intrinsic::nvvm_ptr_local_to_gen, dl, MVT::i32), p);
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InVals.push_back(p2);
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}
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}
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// Clang will check explicit VarArg and issue error if any. However, Clang
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@ -101,11 +101,6 @@ namespace {
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class NVPTXLowerKernelArgs : public FunctionPass {
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bool runOnFunction(Function &F) override;
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// Kernels and regular device functions treat byval arguments
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// differently.
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bool runOnKernelFunction(Function &F);
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bool runOnDeviceFunction(Function &F);
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// handle byval parameters
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void handleByValParam(Argument *Arg);
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// Knowing Ptr must point to the global address space, this function
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@ -197,7 +192,11 @@ void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) {
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// =============================================================================
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// Main function for this pass.
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// =============================================================================
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bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
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bool NVPTXLowerKernelArgs::runOnFunction(Function &F) {
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// Skip non-kernels. See the comments at the top of this file.
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if (!isKernelFunction(F))
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return false;
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if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
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// Mark pointers in byval structs as global.
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for (auto &B : F) {
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@ -229,19 +228,6 @@ bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
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return true;
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}
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// See comments in NVPTXDAGToDAGISel::SelectAddrSpaceCast() for the
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// details on why we need to spill byval arguments into local memory.
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bool NVPTXLowerKernelArgs::runOnDeviceFunction(Function &F) {
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for (Argument &Arg : F.args())
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if (Arg.getType()->isPointerTy() && Arg.hasByValAttr())
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handleByValParam(&Arg);
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return true;
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}
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bool NVPTXLowerKernelArgs::runOnFunction(Function &F) {
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return isKernelFunction(F) ? runOnKernelFunction(F) : runOnDeviceFunction(F);
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}
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FunctionPass *
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llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) {
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return new NVPTXLowerKernelArgs(TM);
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@ -15,7 +15,7 @@ entry:
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%b = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
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%0 = load i32, i32* %b, align 4
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; PTX-NOT: ld.param.u32 {{%r[0-9]+}}, [{{%rd[0-9]+}}]
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; PTX: ld.param.u32 [[value:%r[0-9]+]], [_Z11TakesStruct1SPi_param_0+4]
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; PTX: ld.param.u32 [[value:%r[0-9]+]], [{{%rd[0-9]+}}+4]
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store i32 %0, i32* %output, align 4
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; PTX-NEXT: st.global.u32 [{{%rd[0-9]+}}], [[value]]
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ret void
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@ -28,38 +28,20 @@ define void @kernel2(float addrspace(1)* %input, float addrspace(1)* %output) {
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%struct.S = type { i32*, i32* }
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define void @ptr_in_byval_kernel(%struct.S* byval %input, i32* %output) {
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; CHECK-LABEL: .visible .entry ptr_in_byval_kernel(
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; CHECK: ld.param.u64 %[[optr:rd.*]], [ptr_in_byval_kernel_param_1]
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; CHECK: cvta.to.global.u64 %[[optr_g:.*]], %[[optr]];
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; CHECK: ld.param.u64 %[[iptr:rd.*]], [ptr_in_byval_kernel_param_0+8]
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; CHECK: cvta.to.global.u64 %[[iptr_g:.*]], %[[iptr]];
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define void @ptr_in_byval(%struct.S* byval %input, i32* %output) {
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; CHECK-LABEL: .visible .entry ptr_in_byval(
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; CHECK: cvta.to.global.u64
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; CHECK: cvta.to.global.u64
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%b_ptr = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
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%b = load i32*, i32** %b_ptr, align 4
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%v = load i32, i32* %b, align 4
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; CHECK: ld.global.u32 %[[val:.*]], [%[[iptr_g]]]
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; CHECK: ld.global.u32
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store i32 %v, i32* %output, align 4
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; CHECK: st.global.u32 [%[[optr_g]]], %[[val]]
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ret void
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}
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; Regular functions lower byval arguments differently. We need to make
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; sure that we're loading byval argument data using [symbol+offset].
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; There's also no assumption that all pointers within are in global space.
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define void @ptr_in_byval_func(%struct.S* byval %input, i32* %output) {
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; CHECK-LABEL: .visible .func ptr_in_byval_func(
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; CHECK: ld.param.u64 %[[optr:rd.*]], [ptr_in_byval_func_param_1]
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; CHECK: ld.param.u64 %[[iptr:rd.*]], [ptr_in_byval_func_param_0+8]
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%b_ptr = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
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%b = load i32*, i32** %b_ptr, align 4
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%v = load i32, i32* %b, align 4
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; CHECK: ld.u32 %[[val:.*]], [%[[iptr]]]
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store i32 %v, i32* %output, align 4
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; CHECK: st.u32 [%[[optr]]], %[[val]]
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; CHECK: st.global.u32
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ret void
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}
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!nvvm.annotations = !{!0, !1, !2}
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!0 = !{void (float*, float*)* @kernel, !"kernel", i32 1}
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!1 = !{void (float addrspace(1)*, float addrspace(1)*)* @kernel2, !"kernel", i32 1}
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!2 = !{void (%struct.S*, i32*)* @ptr_in_byval_kernel, !"kernel", i32 1}
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!2 = !{void (%struct.S*, i32*)* @ptr_in_byval, !"kernel", i32 1}
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