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AMDGPU/GlobalISel: Remove redundant or patterns 

These ended up with higher priority than or3 patterns in a future
patch. This also fixes the using VOP2 forms.
This commit is contained in:
Matt Arsenault 2020-01-22 21:36:26 -05:00 committed by Matt Arsenault
parent f14f2a8568
commit 4d14772f5c
2 changed files with 2 additions and 5 deletions
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3
llvm/lib/Target/AMDGPU/AMDGPUGISel.td
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@ -202,9 +202,6 @@ multiclass GISelVop2IntrPat <
def : GISelVop2CommutePat <node, inst, dst_vt, src_vt>;
}
def : GISelSop2Pat <or, S_OR_B32, i32>;
def : GISelVop2Pat <or, V_OR_B32_e32, i32>;
// Since GlobalISel is more flexible then SelectionDAG, I think we can get
// away with adding patterns for integer types and not legalizing all
// loads and stores to vector types. This should help simplify the load/store

4
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
View File

@ -301,8 +301,8 @@ body: |
; WAVE32: $vcc_hi = IMPLICIT_DEF
; WAVE32: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; WAVE32: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; WAVE32: [[V_OR_B32_e32_:%[0-9]+]]:vgpr_32 = V_OR_B32_e32 [[COPY]], [[COPY1]], implicit $exec
; WAVE32: S_ENDPGM 0, implicit [[V_OR_B32_e32_]]
; WAVE32: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[COPY]], [[COPY1]], implicit $exec
; WAVE32: S_ENDPGM 0, implicit [[V_OR_B32_e64_]]
%0:vgpr(s32) = COPY $vgpr0
%1:vgpr(s32) = COPY $vgpr1
%2:vgpr(s32) = G_OR %0, %1