forked from OSchip/llvm-project
libclc: vload/vstore disable assembly and fix offset calculation
This commit gets us back to pure CLC and fixes offset calculations. The next commit will re-enable the assembly implementation for R600, fix bugs related to 64-bit address spaces, and also fix the incorrect assumption that address space identifiers are the same in all architectures. llvm-svn: 186415
This commit is contained in:
Aaron Watry
parent
e08b59f81d
commit
4cb7cf276d
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@ -26,10 +26,8 @@ shared/clamp.cl
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shared/max.cl
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shared/min.cl
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shared/vload.cl
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shared/vload_if.ll
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shared/vload_impl.ll
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shared/vstore.cl
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shared/vstore_if.ll
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shared/vstore_impl.ll
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workitem/get_global_id.cl
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workitem/get_global_size.cl
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@ -2,23 +2,23 @@
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#define VLOAD_VECTORIZE(PRIM_TYPE, ADDR_SPACE) \
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_CLC_OVERLOAD _CLC_DEF PRIM_TYPE##2 vload2(size_t offset, const ADDR_SPACE PRIM_TYPE *x) { \
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return (PRIM_TYPE##2)(x[offset] , x[offset+1]); \
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return (PRIM_TYPE##2)(x[2*offset] , x[2*offset+1]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF PRIM_TYPE##3 vload3(size_t offset, const ADDR_SPACE PRIM_TYPE *x) { \
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return (PRIM_TYPE##3)(x[offset] , x[offset+1], x[offset+2]); \
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return (PRIM_TYPE##3)(x[3*offset] , x[3*offset+1], x[3*offset+2]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF PRIM_TYPE##4 vload4(size_t offset, const ADDR_SPACE PRIM_TYPE *x) { \
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return (PRIM_TYPE##4)(x[offset], x[offset+1], x[offset+2], x[offset+3]); \
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return (PRIM_TYPE##4)(x[4*offset], x[4*offset+1], x[4*offset+2], x[4*offset+3]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF PRIM_TYPE##8 vload8(size_t offset, const ADDR_SPACE PRIM_TYPE *x) { \
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return (PRIM_TYPE##8)(vload4(offset, x), vload4(offset+4, x)); \
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return (PRIM_TYPE##8)(vload4(0, &x[8*offset]), vload4(1, &x[8*offset])); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF PRIM_TYPE##16 vload16(size_t offset, const ADDR_SPACE PRIM_TYPE *x) { \
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return (PRIM_TYPE##16)(vload8(offset, x), vload8(offset+8, x)); \
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return (PRIM_TYPE##16)(vload8(0, &x[16*offset]), vload8(1, &x[16*offset])); \
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} \
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#define VLOAD_ADDR_SPACES(__CLC_SCALAR_GENTYPE) \
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@ -27,12 +27,13 @@
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VLOAD_VECTORIZE(__CLC_SCALAR_GENTYPE, __constant) \
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VLOAD_VECTORIZE(__CLC_SCALAR_GENTYPE, __global) \
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//int/uint are special... see below
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#define VLOAD_TYPES() \
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VLOAD_ADDR_SPACES(char) \
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VLOAD_ADDR_SPACES(uchar) \
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VLOAD_ADDR_SPACES(short) \
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VLOAD_ADDR_SPACES(ushort) \
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VLOAD_ADDR_SPACES(int) \
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VLOAD_ADDR_SPACES(uint) \
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VLOAD_ADDR_SPACES(long) \
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VLOAD_ADDR_SPACES(ulong) \
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VLOAD_ADDR_SPACES(float) \
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@ -43,54 +44,3 @@ VLOAD_TYPES()
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#pragma OPENCL EXTENSION cl_khr_fp64 : enable
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VLOAD_ADDR_SPACES(double)
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#endif
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VLOAD_VECTORIZE(int, __private)
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VLOAD_VECTORIZE(int, __local)
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VLOAD_VECTORIZE(int, __constant)
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VLOAD_VECTORIZE(uint, __private)
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VLOAD_VECTORIZE(uint, __local)
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VLOAD_VECTORIZE(uint, __constant)
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_CLC_OVERLOAD _CLC_DEF int2 vload2(size_t offset, const global int *x) {
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return (int2)(x[offset] , x[offset+1]);
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}
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_CLC_OVERLOAD _CLC_DEF int3 vload3(size_t offset, const global int *x) {
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return (int3)(vload2(offset, x), x[offset+2]);
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}
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_CLC_OVERLOAD _CLC_DEF uint2 vload2(size_t offset, const global uint *x) {
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return (uint2)(x[offset] , x[offset+1]);
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}
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_CLC_OVERLOAD _CLC_DEF uint3 vload3(size_t offset, const global uint *x) {
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return (uint3)(vload2(offset, x), x[offset+2]);
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}
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/*Note: It is known that R600 doesn't support load <2 x ?> and <3 x ?>... so
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* they aren't actually overridden here
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*/
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_CLC_DECL int4 __clc_vload4_int__global(size_t offset, const __global int *);
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_CLC_DECL int8 __clc_vload8_int__global(size_t offset, const __global int *);
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_CLC_DECL int16 __clc_vload16_int__global(size_t offset, const __global int *);
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_CLC_OVERLOAD _CLC_DEF int4 vload4(size_t offset, const global int *x) {
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return __clc_vload4_int__global(offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF int8 vload8(size_t offset, const global int *x) {
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return __clc_vload8_int__global(offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF int16 vload16(size_t offset, const global int *x) {
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return __clc_vload16_int__global(offset, x);
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}
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_CLC_DECL uint4 __clc_vload4_uint__global(size_t offset, const __global uint *);
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_CLC_DECL uint8 __clc_vload8_uint__global(size_t offset, const __global uint *);
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_CLC_DECL uint16 __clc_vload16_uint__global(size_t offset, const __global uint *);
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_CLC_OVERLOAD _CLC_DEF uint4 vload4(size_t offset, const global uint *x) {
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return __clc_vload4_uint__global(offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF uint8 vload8(size_t offset, const global uint *x) {
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return __clc_vload8_uint__global(offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF uint16 vload16(size_t offset, const global uint *x) {
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return __clc_vload16_uint__global(offset, x);
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}
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@ -1,60 +0,0 @@
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;Start int global vload
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declare <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y)
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declare <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y)
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declare <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y)
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declare <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y)
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declare <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y)
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define <2 x i32> @__clc_vload2_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y)
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ret <2 x i32> %call
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}
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define <3 x i32> @__clc_vload3_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y)
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ret <3 x i32> %call
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}
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define <4 x i32> @__clc_vload4_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y)
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ret <4 x i32> %call
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}
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define <8 x i32> @__clc_vload8_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y)
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ret <8 x i32> %call
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}
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define <16 x i32> @__clc_vload16_int__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y)
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ret <16 x i32> %call
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}
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;Start uint global vload
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define <2 x i32> @__clc_vload2_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <2 x i32> @__clc_vload2_impl_i32__global(i32 %x, i32 %y)
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ret <2 x i32> %call
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}
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define <3 x i32> @__clc_vload3_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <3 x i32> @__clc_vload3_impl_i32__global(i32 %x, i32 %y)
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ret <3 x i32> %call
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}
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define <4 x i32> @__clc_vload4_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <4 x i32> @__clc_vload4_impl_i32__global(i32 %x, i32 %y)
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ret <4 x i32> %call
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}
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define <8 x i32> @__clc_vload8_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <8 x i32> @__clc_vload8_impl_i32__global(i32 %x, i32 %y)
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ret <8 x i32> %call
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}
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define <16 x i32> @__clc_vload16_uint__global(i32 %x, i32 %y) nounwind readonly alwaysinline {
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%call = call <16 x i32> @__clc_vload16_impl_i32__global(i32 %x, i32 %y)
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ret <16 x i32> %call
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}
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@ -4,29 +4,29 @@
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#define VSTORE_VECTORIZE(PRIM_TYPE, ADDR_SPACE) \
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_CLC_OVERLOAD _CLC_DEF void vstore2(PRIM_TYPE##2 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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mem[offset] = vec.s0; \
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mem[offset+1] = vec.s1; \
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mem[2*offset] = vec.s0; \
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mem[2*offset+1] = vec.s1; \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore3(PRIM_TYPE##3 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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mem[offset] = vec.s0; \
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mem[offset+1] = vec.s1; \
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mem[offset+2] = vec.s2; \
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mem[3*offset] = vec.s0; \
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mem[3*offset+1] = vec.s1; \
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mem[3*offset+2] = vec.s2; \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore4(PRIM_TYPE##4 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore2(vec.lo, offset, mem); \
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vstore2(vec.hi, offset+2, mem); \
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vstore2(vec.lo, 0, &mem[offset*4]); \
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vstore2(vec.hi, 1, &mem[offset*4]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore8(PRIM_TYPE##8 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore4(vec.lo, offset, mem); \
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vstore4(vec.hi, offset+4, mem); \
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vstore4(vec.lo, 0, &mem[offset*8]); \
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vstore4(vec.hi, 1, &mem[offset*8]); \
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} \
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\
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_CLC_OVERLOAD _CLC_DEF void vstore16(PRIM_TYPE##16 vec, size_t offset, ADDR_SPACE PRIM_TYPE *mem) { \
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vstore8(vec.lo, offset, mem); \
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vstore8(vec.hi, offset+8, mem); \
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vstore8(vec.lo, 0, &mem[offset*16]); \
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vstore8(vec.hi, 1, &mem[offset*16]); \
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} \
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#define VSTORE_ADDR_SPACES(__CLC_SCALAR___CLC_GENTYPE) \
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@ -34,12 +34,13 @@
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VSTORE_VECTORIZE(__CLC_SCALAR___CLC_GENTYPE, __local) \
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VSTORE_VECTORIZE(__CLC_SCALAR___CLC_GENTYPE, __global) \
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//int/uint are special... see below
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#define VSTORE_TYPES() \
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VSTORE_ADDR_SPACES(char) \
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VSTORE_ADDR_SPACES(uchar) \
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VSTORE_ADDR_SPACES(short) \
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VSTORE_ADDR_SPACES(ushort) \
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VSTORE_ADDR_SPACES(int) \
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VSTORE_ADDR_SPACES(uint) \
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VSTORE_ADDR_SPACES(long) \
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VSTORE_ADDR_SPACES(ulong) \
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VSTORE_ADDR_SPACES(float) \
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@ -50,58 +51,3 @@ VSTORE_TYPES()
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#pragma OPENCL EXTENSION cl_khr_fp64 : enable
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VSTORE_ADDR_SPACES(double)
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#endif
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VSTORE_VECTORIZE(int, __private)
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VSTORE_VECTORIZE(int, __local)
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VSTORE_VECTORIZE(uint, __private)
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VSTORE_VECTORIZE(uint, __local)
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_CLC_OVERLOAD _CLC_DEF void vstore2(int2 vec, size_t offset, global int *mem) {
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mem[offset] = vec.s0;
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mem[offset+1] = vec.s1;
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}
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_CLC_OVERLOAD _CLC_DEF void vstore3(int3 vec, size_t offset, global int *mem) {
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mem[offset] = vec.s0;
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mem[offset+1] = vec.s1;
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mem[offset+2] = vec.s2;
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}
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_CLC_OVERLOAD _CLC_DEF void vstore2(uint2 vec, size_t offset, global uint *mem) {
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mem[offset] = vec.s0;
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mem[offset+1] = vec.s1;
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}
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_CLC_OVERLOAD _CLC_DEF void vstore3(uint3 vec, size_t offset, global uint *mem) {
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mem[offset] = vec.s0;
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mem[offset+1] = vec.s1;
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mem[offset+2] = vec.s2;
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}
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/*Note: R600 probably doesn't support store <2 x ?> and <3 x ?>... so
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* they aren't actually overridden here... lowest-common-denominator
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*/
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_CLC_DECL void __clc_vstore4_int__global(int4 vec, size_t offset, __global int *);
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_CLC_DECL void __clc_vstore8_int__global(int8 vec, size_t offset, __global int *);
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_CLC_DECL void __clc_vstore16_int__global(int16 vec, size_t offset, __global int *);
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_CLC_OVERLOAD _CLC_DEF void vstore4(int4 vec, size_t offset, global int *x) {
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__clc_vstore4_int__global(vec, offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF void vstore8(int8 vec, size_t offset, global int *x) {
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__clc_vstore8_int__global(vec, offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF void vstore16(int16 vec, size_t offset, global int *x) {
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__clc_vstore16_int__global(vec, offset, x);
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}
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_CLC_DECL void __clc_vstore4_uint__global(uint4 vec, size_t offset, __global uint *);
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_CLC_DECL void __clc_vstore8_uint__global(uint8 vec, size_t offset, __global uint *);
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_CLC_DECL void __clc_vstore16_uint__global(uint16 vec, size_t offset, __global uint *);
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_CLC_OVERLOAD _CLC_DEF void vstore4(uint4 vec, size_t offset, global uint *x) {
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__clc_vstore4_uint__global(vec, offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF void vstore8(uint8 vec, size_t offset, global uint *x) {
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__clc_vstore8_uint__global(vec, offset, x);
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}
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_CLC_OVERLOAD _CLC_DEF void vstore16(uint16 vec, size_t offset, global uint *x) {
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__clc_vstore16_uint__global(vec, offset, x);
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}
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@ -1,59 +0,0 @@
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;Start int global vstore
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declare void @__clc_vstore2_impl_i32__global(<2 x i32> %vec, i32 %x, i32 %y)
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declare void @__clc_vstore3_impl_i32__global(<3 x i32> %vec, i32 %x, i32 %y)
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declare void @__clc_vstore4_impl_i32__global(<4 x i32> %vec, i32 %x, i32 %y)
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declare void @__clc_vstore8_impl_i32__global(<8 x i32> %vec, i32 %x, i32 %y)
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declare void @__clc_vstore16_impl_i32__global(<16 x i32> %vec, i32 %x, i32 %y)
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define void @__clc_vstore2_int__global(<2 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore2_impl_i32__global(<2 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore3_int__global(<3 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore3_impl_i32__global(<3 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore4_int__global(<4 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore4_impl_i32__global(<4 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore8_int__global(<8 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore8_impl_i32__global(<8 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore16_int__global(<16 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore16_impl_i32__global(<16 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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;Start uint global vstore
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define void @__clc_vstore2_uint__global(<2 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore2_impl_i32__global(<2 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore3_uint__global(<3 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
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call void @__clc_vstore3_impl_i32__global(<3 x i32> %vec, i32 %x, i32 %y)
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ret void
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}
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define void @__clc_vstore4_uint__global(<4 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
|
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call void @__clc_vstore4_impl_i32__global(<4 x i32> %vec, i32 %x, i32 %y)
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @__clc_vstore8_uint__global(<8 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
|
||||
call void @__clc_vstore8_impl_i32__global(<8 x i32> %vec, i32 %x, i32 %y)
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @__clc_vstore16_uint__global(<16 x i32> %vec, i32 %x, i32 %y) nounwind alwaysinline {
|
||||
call void @__clc_vstore16_impl_i32__global(<16 x i32> %vec, i32 %x, i32 %y)
|
||||
ret void
|
||||
}
|
||||
Loading…
Reference in New Issue