maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[PowerPC] Correct P7 dispatch unit allocation for vector instructions 

llvm-svn: 205222
This commit is contained in:
Hal Finkel 2014-03-31 17:02:10 +00:00
parent ed0e88c31a
commit 4c8f634f23
1 changed files with 8 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
llvm/lib/Target/PowerPC/PPCScheduleP7.td
View File

@ -339,36 +339,28 @@ def P7Itineraries : ProcessorItineraries<
P7_DU3, P7_DU4], 0>,
InstrStage<1, [P7_VS1, P7_VS2]>],
[5, 1, 1]>,
InstrItinData<IIC_VecGeneral , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecGeneral , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1]>],
[2, 1, 1]>,
InstrItinData<IIC_VecVSL , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecVSL , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1]>],
[2, 1, 1]>,
InstrItinData<IIC_VecVSR , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecVSR , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1]>],
[2, 1, 1]>,
InstrItinData<IIC_VecFP , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecFP , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1, P7_VS2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecFPCompare, [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecFPCompare, [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1, P7_VS2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecFPRound , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecFPRound , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1, P7_VS2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecComplex , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecComplex , [InstrStage<1, [P7_DU1], 0>,
InstrStage<1, [P7_VS1]>],
[7, 1, 1]>,
InstrItinData<IIC_VecPerm , [InstrStage<1, [P7_DU1, P7_DU2,
P7_DU3, P7_DU4], 0>,
InstrItinData<IIC_VecPerm , [InstrStage<1, [P7_DU1, P7_DU2], 0>,
InstrStage<1, [P7_VS2]>],
[3, 1, 1]>
]>;