forked from OSchip/llvm-project
Emit ARM EHABI unwinding instructions for 3 more Thumb instructions.
llvm-svn: 148473
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3825e9770b
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@ -1107,6 +1107,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
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break;
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case ARM::STR_PRE_IMM:
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case ARM::STR_PRE_REG:
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case ARM::t2STR_PRE:
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assert(MI->getOperand(2).getReg() == ARM::SP &&
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"Only stack pointer as a source reg is supported");
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RegList.push_back(SrcReg);
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@ -1122,12 +1123,14 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
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MI->dump();
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assert(0 && "Unsupported opcode for unwinding information");
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case ARM::MOVr:
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case ARM::tMOVr:
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Offset = 0;
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break;
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case ARM::ADDri:
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Offset = -MI->getOperand(2).getImm();
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break;
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case ARM::SUBri:
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case ARM::t2SUBri:
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Offset = MI->getOperand(2).getImm();
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break;
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case ARM::tSUBspi:
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@ -0,0 +1,15 @@
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; Test that the EHABI unwind instruction generator does not encounter any
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; unfamiliar instructions.
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; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim
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; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi
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define void @_Z1fv() nounwind {
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entry:
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ret void
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}
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define void @_Z1gv() nounwind {
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entry:
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call void @_Z1fv()
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ret void
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}
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