forked from OSchip/llvm-project
start parsing instructions into patterns, start doing many more checks of
'set's. llvm-svn: 23343
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b011cb2746
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@ -654,17 +654,66 @@ void DAGISelEmitter::ParseAndResolveInstructions() {
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I->error("Could not infer all types in pattern!");
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}
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// Verify that the top-level forms in the instruction are of void type.
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for (unsigned j = 0, e = I->getNumTrees(); j != e; ++j)
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if (I->getTree(j)->getType() != MVT::isVoid) {
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// Verify that the top-level forms in the instruction are of void type, and
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// figure out how many of the instruction operands are destinations.
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for (unsigned j = 0, e = I->getNumTrees(); j != e; ++j) {
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TreePatternNode *Pat = I->getTree(j);
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if (Pat->getType() != MVT::isVoid) {
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I->dump();
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I->error("Top-level forms in instruction pattern should have"
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" void types");
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}
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// Investigate sets.
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if (Pat->getOperator()->getName() == "set") {
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if (Pat->getNumChildren() == 0)
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I->error("set requires operands!");
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else if (Pat->getNumChildren() & 1)
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I->error("set requires an even number of operands");
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// Check the set destinations.
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unsigned NumValues = Pat->getNumChildren()/2;
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for (unsigned i = 0; i != NumValues; ++i) {
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TreePatternNode *Dest = Pat->getChild(i);
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if (!Dest->isLeaf())
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I->error("set destination should be a virtual register!");
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DefInit *Val = dynamic_cast<DefInit*>(Dest->getLeafValue());
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if (!Val)
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I->error("set destination should be a virtual register!");
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if (!Val->getDef()->isSubClassOf("RegisterClass"))
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I->error("set destination should be a virtual register!");
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}
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}
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}
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DEBUG(I->dump());
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Instructions.push_back(I);
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}
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// If we can, convert the instructions to be a patterns that are matched!
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for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
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TreePattern *I = Instructions[i];
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if (I->getNumTrees() != 1) {
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std::cerr << "CANNOT HANDLE: " << I->getRecord()->getName() << " yet!";
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continue;
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}
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TreePatternNode *Pattern = I->getTree(0);
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if (Pattern->getOperator()->getName() != "set")
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continue; // Not a set (store or something?)
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if (Pattern->getNumChildren() != 2)
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continue; // Not a set of a single value (not handled so far)
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TreePatternNode *SrcPattern = Pattern->getChild(1)->clone();
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TreePatternNode *DstPattern = SrcPattern->clone(); // FIXME: WRONG
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PatternsToMatch.push_back(std::make_pair(SrcPattern, DstPattern));
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DEBUG(std::cerr << "PATTERN TO MATCH: "; SrcPattern->dump();
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std::cerr << "\nRESULT DAG : ";
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DstPattern->dump(); std::cerr << "\n");
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}
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}
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void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
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@ -697,6 +746,9 @@ void DAGISelEmitter::run(std::ostream &OS) {
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EmitSourceFileHeader("DAG Instruction Selector for the " + Target.getName() +
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" target", OS);
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OS << "// *** NOTE: This file is #included into the middle of the target\n"
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<< "// *** instruction selector class. These functions are really "
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<< "methods.\n\n";
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ParseNodeInfo();
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ParseNodeTransforms(OS);
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ParseAndResolvePatternFragments(OS);
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@ -286,6 +286,11 @@ class DAGISelEmitter : public TableGenBackend {
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std::map<Record*, std::pair<Record*, std::string> > SDNodeXForms;
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std::map<Record*, TreePattern*> PatternFragments;
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std::vector<TreePattern*> Instructions;
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/// PatternsToMatch - All of the things we are matching on the DAG. The first
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/// value is the pattern to match, the second pattern is the result to
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/// emit.
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std::vector<std::pair<TreePatternNode*, TreePatternNode*> > PatternsToMatch;
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public:
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DAGISelEmitter(RecordKeeper &R) : Records(R) {}
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