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[X86][SSE] lowerVectorShuffleAsByteShift tidyup 

Removed local isSequential predicate and use standard helper isSequentialOrUndefInRange instead.

llvm-svn: 225216
This commit is contained in:
Simon Pilgrim 2015-01-05 22:08:48 +00:00
parent 6e6c1c3ef2
commit 4c55af6850
1 changed files with 14 additions and 21 deletions
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23
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -7721,17 +7721,6 @@ static SDValue lowerVectorShuffleAsByteShift(SDLoc DL, MVT VT, SDValue V1,
int Size = Mask.size();
int Scale = 16 / Size;
auto isSequential = [](int Base, int StartIndex, int EndIndex, int MaskOffset,
ArrayRef<int> Mask) {
for (int i = StartIndex; i < EndIndex; i++) {
if (Mask[i] < 0)
continue;
if (i + Base != Mask[i] - MaskOffset)
return false;
}
return true;
};
for (int Shift = 1; Shift < Size; Shift++) {
int ByteShift = Shift * Scale;
@ -7745,8 +7734,10 @@ static SDValue lowerVectorShuffleAsByteShift(SDLoc DL, MVT VT, SDValue V1,
}
if (ZeroableRight) {
bool ValidShiftRight1 = isSequential(Shift, 0, Size - Shift, 0, Mask);
bool ValidShiftRight2 = isSequential(Shift, 0, Size - Shift, Size, Mask);
bool ValidShiftRight1 =
isSequentialOrUndefInRange(Mask, 0, Size - Shift, Shift);
bool ValidShiftRight2 =
isSequentialOrUndefInRange(Mask, 0, Size - Shift, Size + Shift);
if (ValidShiftRight1 || ValidShiftRight2) {
// Cast the inputs to v2i64 to match PSRLDQ.
@ -7768,8 +7759,10 @@ static SDValue lowerVectorShuffleAsByteShift(SDLoc DL, MVT VT, SDValue V1,
}
if (ZeroableLeft) {
bool ValidShiftLeft1 = isSequential(-Shift, Shift, Size, 0, Mask);
bool ValidShiftLeft2 = isSequential(-Shift, Shift, Size, Size, Mask);
bool ValidShiftLeft1 =
isSequentialOrUndefInRange(Mask, Shift, Size - Shift, 0);
bool ValidShiftLeft2 =
isSequentialOrUndefInRange(Mask, Shift, Size - Shift, Size);
if (ValidShiftLeft1 || ValidShiftLeft2) {
// Cast the inputs to v2i64 to match PSLLDQ.