forked from OSchip/llvm-project
[CodeGen] Use ArrayRef instead of std::vector&. NFC.
The former lets us use SmallVectors. Do so in ARM and AArch64. llvm-svn: 229925
This commit is contained in:
parent
1ec3c5bc99
commit
4c2b0781a5
|
@ -2176,8 +2176,7 @@ public:
|
|||
|
||||
void AddToWorklist(SDNode *N);
|
||||
void RemoveFromWorklist(SDNode *N);
|
||||
SDValue CombineTo(SDNode *N, const std::vector<SDValue> &To,
|
||||
bool AddTo = true);
|
||||
SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true);
|
||||
SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
|
||||
SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
|
||||
|
||||
|
|
|
@ -466,7 +466,7 @@ void TargetLowering::DAGCombinerInfo::RemoveFromWorklist(SDNode *N) {
|
|||
}
|
||||
|
||||
SDValue TargetLowering::DAGCombinerInfo::
|
||||
CombineTo(SDNode *N, const std::vector<SDValue> &To, bool AddTo) {
|
||||
CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo) {
|
||||
return ((DAGCombiner*)DC)->CombineTo(N, &To[0], To.size(), AddTo);
|
||||
}
|
||||
|
||||
|
|
|
@ -7973,7 +7973,7 @@ static SDValue performPostLD1Combine(SDNode *N,
|
|||
LoadSDN->getMemOperand());
|
||||
|
||||
// Update the uses.
|
||||
std::vector<SDValue> NewResults;
|
||||
SmallVector<SDValue, 2> NewResults;
|
||||
NewResults.push_back(SDValue(LD, 0)); // The result of load
|
||||
NewResults.push_back(SDValue(UpdN.getNode(), 2)); // Chain
|
||||
DCI.CombineTo(LD, NewResults);
|
||||
|
|
|
@ -8990,7 +8990,7 @@ static SDValue CombineBaseUpdate(SDNode *N,
|
|||
MemInt->getMemOperand());
|
||||
|
||||
// Update the uses.
|
||||
std::vector<SDValue> NewResults;
|
||||
SmallVector<SDValue, 5> NewResults;
|
||||
for (unsigned i = 0; i < NumResultVecs; ++i) {
|
||||
NewResults.push_back(SDValue(UpdN.getNode(), i));
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue