From 4c244b2833bdc51bbb7970ea6433e844dfddf622 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Tue, 16 Aug 2022 23:29:01 -0700 Subject: [PATCH] [ELF] Fix .plt.got comments. NFC --- lld/ELF/Arch/AArch64.cpp | 24 ++++++++++++------------ lld/ELF/Arch/ARM.cpp | 16 ++++++++-------- 2 files changed, 20 insertions(+), 20 deletions(-) diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp index 974830ca7023..4547924d1090 100644 --- a/lld/ELF/Arch/AArch64.cpp +++ b/lld/ELF/Arch/AArch64.cpp @@ -228,9 +228,9 @@ void AArch64::writeIgotPlt(uint8_t *buf, const Symbol &s) const { void AArch64::writePltHeader(uint8_t *buf) const { const uint8_t pltData[] = { 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! - 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) - 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] - 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) + 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.got.plt[2])) + 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[2]))] + 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.got.plt[2])) 0x20, 0x02, 0x1f, 0xd6, // br x17 0x1f, 0x20, 0x03, 0xd5, // nop 0x1f, 0x20, 0x03, 0xd5, // nop @@ -249,9 +249,9 @@ void AArch64::writePltHeader(uint8_t *buf) const { void AArch64::writePlt(uint8_t *buf, const Symbol &sym, uint64_t pltEntryAddr) const { const uint8_t inst[] = { - 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) - 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] - 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[n])) + 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.got.plt[n])) + 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[n]))] + 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.got.plt[n])) 0x20, 0x02, 0x1f, 0xd6 // br x17 }; memcpy(buf, inst, sizeof(inst)); @@ -806,9 +806,9 @@ void AArch64BtiPac::writePltHeader(uint8_t *buf) const { const uint8_t btiData[] = { 0x5f, 0x24, 0x03, 0xd5 }; // bti c const uint8_t pltData[] = { 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! - 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[2])) - 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[2]))] - 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.plt.got[2])) + 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.got.plt[2])) + 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[2]))] + 0x10, 0x02, 0x00, 0x91, // add x16, x16, Offset(&(.got.plt[2])) 0x20, 0x02, 0x1f, 0xd6, // br x17 0x1f, 0x20, 0x03, 0xd5, // nop 0x1f, 0x20, 0x03, 0xd5 // nop @@ -842,9 +842,9 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol &sym, // [btiData] addrInst (pacBr | stdBr) [nopData] const uint8_t btiData[] = { 0x5f, 0x24, 0x03, 0xd5 }; // bti c const uint8_t addrInst[] = { - 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.plt.got[n])) - 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.plt.got[n]))] - 0x10, 0x02, 0x00, 0x91 // add x16, x16, Offset(&(.plt.got[n])) + 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.got.plt[n])) + 0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[n]))] + 0x10, 0x02, 0x00, 0x91 // add x16, x16, Offset(&(.got.plt[n])) }; const uint8_t pacBr[] = { 0x9f, 0x21, 0x03, 0xd5, // autia1716 diff --git a/lld/ELF/Arch/ARM.cpp b/lld/ELF/Arch/ARM.cpp index f7d4c3b8a70a..ff692edf2af5 100644 --- a/lld/ELF/Arch/ARM.cpp +++ b/lld/ELF/Arch/ARM.cpp @@ -192,7 +192,7 @@ void ARM::writeIgotPlt(uint8_t *buf, const Symbol &s) const { } // Long form PLT Header that does not have any restrictions on the displacement -// of the .plt from the .plt.got. +// of the .plt from the .got.plt. static void writePltHeaderLong(uint8_t *buf) { const uint8_t pltData[] = { 0x04, 0xe0, 0x2d, 0xe5, // str lr, [sp,#-4]! @@ -209,7 +209,7 @@ static void writePltHeaderLong(uint8_t *buf) { write32le(buf + 16, gotPlt - l1 - 8); } -// The default PLT header requires the .plt.got to be within 128 Mb of the +// The default PLT header requires the .got.plt to be within 128 Mb of the // .plt in the positive direction. void ARM::writePltHeader(uint8_t *buf) const { // Use a similar sequence to that in writePlt(), the difference is the calling @@ -245,21 +245,21 @@ void ARM::addPltHeaderSymbols(InputSection &isec) const { } // Long form PLT entries that do not have any restrictions on the displacement -// of the .plt from the .plt.got. +// of the .plt from the .got.plt. static void writePltLong(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr) { const uint8_t pltData[] = { 0x04, 0xc0, 0x9f, 0xe5, // ldr ip, L2 0x0f, 0xc0, 0x8c, 0xe0, // L1: add ip, ip, pc 0x00, 0xf0, 0x9c, 0xe5, // ldr pc, [ip] - 0x00, 0x00, 0x00, 0x00, // L2: .word Offset(&(.plt.got) - L1 - 8 + 0x00, 0x00, 0x00, 0x00, // L2: .word Offset(&(.got.plt) - L1 - 8 }; memcpy(buf, pltData, sizeof(pltData)); uint64_t l1 = pltEntryAddr + 4; write32le(buf + 12, gotPltEntryAddr - l1 - 8); } -// The default PLT entries require the .plt.got to be within 128 Mb of the +// The default PLT entries require the .got.plt to be within 128 Mb of the // .plt in the positive direction. void ARM::writePlt(uint8_t *buf, const Symbol &sym, uint64_t pltEntryAddr) const { @@ -269,9 +269,9 @@ void ARM::writePlt(uint8_t *buf, const Symbol &sym, // hard code the most compact rotations for simplicity. This saves a load // instruction over the long plt sequences. const uint32_t pltData[] = { - 0xe28fc600, // L1: add ip, pc, #0x0NN00000 Offset(&(.plt.got) - L1 - 8 - 0xe28cca00, // add ip, ip, #0x000NN000 Offset(&(.plt.got) - L1 - 8 - 0xe5bcf000, // ldr pc, [ip, #0x00000NNN] Offset(&(.plt.got) - L1 - 8 + 0xe28fc600, // L1: add ip, pc, #0x0NN00000 Offset(&(.got.plt) - L1 - 8 + 0xe28cca00, // add ip, ip, #0x000NN000 Offset(&(.got.plt) - L1 - 8 + 0xe5bcf000, // ldr pc, [ip, #0x00000NNN] Offset(&(.got.plt) - L1 - 8 }; uint64_t offset = sym.getGotPltVA() - pltEntryAddr - 8;