[SVE][CodeGen] Extend isConstantSplatValue to support ISD::SPLAT_VECTOR

Updated the affected scalable_of_scalable tests in sve-gep.ll, as isConstantSplatValue now returns true in DAGCombiner::visitMUL and folds `(mul x, 1) -> x`

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91363
This commit is contained in:
Kerry McLaughlin 2020-11-26 10:54:56 +00:00
parent 035955f925
commit 4bee3197f6
2 changed files with 14 additions and 9 deletions

View File

@ -139,6 +139,15 @@ bool ConstantFPSDNode::isValueValidForType(EVT VT,
//===----------------------------------------------------------------------===//
bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
if (N->getOpcode() == ISD::SPLAT_VECTOR) {
unsigned EltSize =
N->getValueType(0).getVectorElementType().getSizeInBits();
if (auto *Op0 = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
SplatVal = Op0->getAPIntValue().truncOrSelf(EltSize);
return true;
}
}
auto *BV = dyn_cast<BuildVectorSDNode>(N);
if (!BV)
return false;

View File

@ -105,11 +105,9 @@ define <vscale x 2 x <vscale x 2 x i64>*> @scalable_of_scalable_1(<vscale x 2 x
; CHECK-LABEL: scalable_of_scalable_1:
; CHECK: // %bb.0:
; CHECK-NEXT: rdvl x8, #1
; CHECK-NEXT: mov z1.d, #1 // =0x1
; CHECK-NEXT: mov z0.d, x0
; CHECK-NEXT: mov z2.d, x8
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: mla z0.d, p0/m, z2.d, z1.d
; CHECK-NEXT: mov z0.d, x8
; CHECK-NEXT: mov z1.d, x0
; CHECK-NEXT: add z0.d, z1.d, z0.d
; CHECK-NEXT: ret
%idx = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 1, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
%d = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %base, <vscale x 2 x i64> %idx
@ -120,10 +118,8 @@ define <vscale x 2 x <vscale x 2 x i64>*> @scalable_of_scalable_2(<vscale x 2 x
; CHECK-LABEL: scalable_of_scalable_2:
; CHECK: // %bb.0:
; CHECK-NEXT: rdvl x8, #1
; CHECK-NEXT: mov z1.d, #1 // =0x1
; CHECK-NEXT: mov z2.d, x8
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: mla z0.d, p0/m, z2.d, z1.d
; CHECK-NEXT: mov z1.d, x8
; CHECK-NEXT: add z0.d, z0.d, z1.d
; CHECK-NEXT: ret
%idx = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 1, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
%d = getelementptr <vscale x 2 x i64>, <vscale x 2 x <vscale x 2 x i64>*> %base, <vscale x 2 x i64> %idx