forked from OSchip/llvm-project
GlobalISel: Partially implement lower for G_INSERT
llvm-svn: 373946
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parent
1237aa2996
commit
4bcdcad91b
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@ -231,6 +231,7 @@ public:
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LegalizeResult lowerShuffleVector(MachineInstr &MI);
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LegalizeResult lowerDynStackAlloc(MachineInstr &MI);
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LegalizeResult lowerExtract(MachineInstr &MI);
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LegalizeResult lowerInsert(MachineInstr &MI);
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private:
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MachineRegisterInfo &MRI;
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@ -2249,6 +2249,8 @@ LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
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return lowerDynStackAlloc(MI);
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case G_EXTRACT:
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return lowerExtract(MI);
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case G_INSERT:
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return lowerInsert(MI);
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}
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}
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@ -4134,3 +4136,42 @@ LegalizerHelper::lowerExtract(MachineInstr &MI) {
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return UnableToLegalize;
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}
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LegalizerHelper::LegalizeResult LegalizerHelper::lowerInsert(MachineInstr &MI) {
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Register Dst = MI.getOperand(0).getReg();
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Register Src = MI.getOperand(1).getReg();
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Register InsertSrc = MI.getOperand(2).getReg();
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uint64_t Offset = MI.getOperand(3).getImm();
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LLT DstTy = MRI.getType(Src);
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LLT InsertTy = MRI.getType(InsertSrc);
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if (InsertTy.isScalar() &&
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(DstTy.isScalar() ||
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(DstTy.isVector() && DstTy.getElementType() == InsertTy))) {
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LLT IntDstTy = DstTy;
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if (!DstTy.isScalar()) {
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IntDstTy = LLT::scalar(DstTy.getSizeInBits());
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Src = MIRBuilder.buildBitcast(IntDstTy, Src).getReg(0);
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}
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Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0);
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if (Offset != 0) {
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auto ShiftAmt = MIRBuilder.buildConstant(IntDstTy, Offset);
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ExtInsSrc = MIRBuilder.buildShl(IntDstTy, ExtInsSrc, ShiftAmt).getReg(0);
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}
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APInt MaskVal = ~APInt::getBitsSet(DstTy.getSizeInBits(), Offset,
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InsertTy.getSizeInBits());
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auto Mask = MIRBuilder.buildConstant(IntDstTy, MaskVal);
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auto MaskedSrc = MIRBuilder.buildAnd(IntDstTy, Src, Mask);
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auto Or = MIRBuilder.buildOr(IntDstTy, MaskedSrc, ExtInsSrc);
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MIRBuilder.buildBitcast(Dst, Or);
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MI.eraseFromParent();
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return Legalized;
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}
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return UnableToLegalize;
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}
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@ -912,13 +912,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
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unsigned LitTyIdx = Op == G_EXTRACT ? 0 : 1;
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// FIXME: Doesn't handle extract of illegal sizes.
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auto &Builder = getActionDefinitionsBuilder(Op);
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// FIXME: Cleanup when G_INSERT lowering implemented.
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if (Op == G_EXTRACT)
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Builder.lowerIf(all(typeIs(LitTyIdx, S16), sizeIs(BigTyIdx, 32)));
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Builder
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getActionDefinitionsBuilder(Op)
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.lowerIf(all(typeIs(LitTyIdx, S16), sizeIs(BigTyIdx, 32)))
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// FIXME: Multiples of 16 should not be legal.
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.legalIf([=](const LegalityQuery &Query) {
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const LLT BigTy = Query.Types[BigTyIdx];
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const LLT LitTy = Query.Types[LitTyIdx];
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@ -762,15 +762,48 @@ body: |
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; CHECK-LABEL: name: test_insert_v2s16_s16_offset0
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK: [[INSERT:%[0-9]+]]:_(<2 x s16>) = G_INSERT [[COPY]], [[TRUNC]](s16), 0
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; CHECK: $vgpr0 = COPY [[INSERT]](<2 x s16>)
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65536
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[AND]]
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; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(<2 x s16>) = G_INSERT %0, %2, 0
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$vgpr0 = COPY %3
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...
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---
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name: test_insert_v2s16_s16_offset1
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_insert_v2s16_s16_offset1
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65535
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
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; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(<2 x s16>) = G_INSERT %0, %2, 1
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$vgpr0 = COPY %3
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...
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---
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name: test_insert_v2s16_s16_offset16
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body: |
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@ -780,9 +813,17 @@ body: |
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; CHECK-LABEL: name: test_insert_v2s16_s16_offset16
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; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK: [[INSERT:%[0-9]+]]:_(<2 x s16>) = G_INSERT [[COPY]], [[TRUNC]](s16), 16
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; CHECK: $vgpr0 = COPY [[INSERT]](<2 x s16>)
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>)
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
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; CHECK: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST1]](<2 x s16>)
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%0:_(<2 x s16>) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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@ -1247,3 +1288,104 @@ body: |
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%3:_(s64) = G_INSERT %0, %2, 48
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$vgpr0_vgpr1 = COPY %3
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...
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---
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name: test_insert_s32_s16_offset0
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_insert_s32_s16_offset0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65536
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[AND]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(s32) = G_INSERT %1, %2, 0
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$vgpr0 = COPY %3
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...
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---
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name: test_insert_s32_s16_offset1
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_insert_s32_s16_offset1
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65535
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(s32) = G_INSERT %1, %2, 1
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$vgpr0 = COPY %3
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...
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---
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name: test_insert_s32_s16_offset8
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_insert_s32_s16_offset8
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65281
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(s32) = G_INSERT %1, %2, 8
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$vgpr0 = COPY %3
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...
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---
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name: test_insert_s32_s16_offset16
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: test_insert_s32_s16_offset16
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
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; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
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; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C]]
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
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; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
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; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
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; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]]
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; CHECK: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[OR]](s32)
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; CHECK: $vgpr0 = COPY [[BITCAST]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s16) = G_TRUNC %1
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%3:_(s32) = G_INSERT %1, %2, 16
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$vgpr0 = COPY %3
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...
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