forked from OSchip/llvm-project
[AMDGPU] Pre-commit tests for D129759
Differential Revision: https://reviews.llvm.org/D129760
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@ -19,6 +19,75 @@ bb:
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ret void
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}
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; GCN-LABEL: {{^}}test_membound_1:
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; GCN: MemoryBound: 0
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define amdgpu_kernel void @test_membound_1(<2 x double> addrspace(1)* nocapture readonly %ptr.0,
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<2 x double> addrspace(1)* nocapture %ptr.1,
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<2 x double> %arg.0, i32 %arg.1, <4 x double> %arg.2) {
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bb.entry:
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%id.32 = tail call i32 @llvm.amdgcn.workitem.id.x()
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%id.0 = zext i32 %id.32 to i64
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%gep.0 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.0
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%ld.0 = load <2 x double>, <2 x double> addrspace(1)* %gep.0, align 16
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%add.0 = fadd <2 x double> %arg.0, %ld.0
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%id.1 = add nuw nsw i64 %id.0, 1
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%gep.1 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.1
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%ld.1 = load <2 x double>, <2 x double> addrspace(1)* %gep.1, align 16
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%add.1 = fadd <2 x double> %add.0, %ld.1
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%id.2 = add nuw nsw i64 %id.0, 2
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%gep.2 = getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.2
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%ld.2 = load <2 x double>, <2 x double> addrspace(1)* %gep.2, align 16
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%add.2 = fadd <2 x double> %add.1, %ld.2
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%id.3 = add nuw nsw i64 %id.0, 3
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%gep.3= getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.3
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%ld.3 = load <2 x double>, <2 x double> addrspace(1)* %gep.3, align 16
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%add.3 = fadd <2 x double> %add.2, %ld.3
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%id.4 = add nuw nsw i64 %id.0, 4
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%gep.4= getelementptr inbounds <2 x double>, <2 x double> addrspace(1)* %ptr.0, i64 %id.4
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%ld.4 = load <2 x double>, <2 x double> addrspace(1)* %gep.4, align 16
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%add.4 = fadd <2 x double> %add.3, %ld.4
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store <2 x double> %add.4, <2 x double> addrspace(1)* %ptr.1, align 16
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%cond = icmp eq i32 %arg.1, 0
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br i1 %cond, label %bb.true, label %bb.ret
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bb.true:
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%i0.arg.0 = extractelement <2 x double> %arg.0, i32 0
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%i1.arg.0 = extractelement <2 x double> %arg.0, i32 1
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%add.1.0 = fadd double %i0.arg.0, %i1.arg.0
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%i0.arg.2 = extractelement <4 x double> %arg.2, i32 0
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%i1.arg.2 = extractelement <4 x double> %arg.2, i32 1
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%add.1.1 = fadd double %i0.arg.2, %i1.arg.2
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%add.1.2 = fadd double %add.1.0, %add.1.1
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%i2.arg.2 = extractelement <4 x double> %arg.2, i32 2
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%i3.arg.2 = extractelement <4 x double> %arg.2, i32 3
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%add.1.3 = fadd double %i2.arg.2, %i3.arg.2
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%add.1.4 = fadd double %add.1.2, %add.1.3
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%i0.add.0 = extractelement <2 x double> %add.0, i32 0
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%i1.add.0 = extractelement <2 x double> %add.0, i32 1
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%add.1.5 = fadd double %i0.add.0, %i1.add.0
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%add.1.6 = fadd double %add.1.4, %add.1.5
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%i0.add.1 = extractelement <2 x double> %add.1, i32 0
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%i1.add.1 = extractelement <2 x double> %add.1, i32 1
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%add.1.7 = fadd double %i0.add.1, %i1.add.1
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%add.1.8 = fadd double %add.1.6, %add.1.7
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%i0.add.2 = extractelement <2 x double> %add.2, i32 0
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%i1.add.2 = extractelement <2 x double> %add.2, i32 1
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%add.1.9 = fadd double %i0.add.2, %i1.add.2
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%add.1.10 = fadd double %add.1.8, %add.1.9
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%ptr.1.bc = bitcast <2 x double> addrspace(1)* %ptr.1 to double addrspace(1)*
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store double %add.1.8, double addrspace(1)* %ptr.1.bc, align 8
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br label %bb.ret
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bb.ret:
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ret void
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}
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; GCN-LABEL: {{^}}test_large_stride:
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; GCN: MemoryBound: 0
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; GCN: WaveLimiterHint : 1
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