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[DAGCombiner] Push truncate through adde when the carry isn't used. 

Summary: As per title.

Reviewers: mkuper, spatel, bkramer, RKSimon, zvi

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29528

llvm-svn: 294394
This commit is contained in:
Amaury Sechet 2017-02-08 00:32:36 +00:00
parent d35528b3e7
commit 4b946916ac
3 changed files with 17 additions and 9 deletions
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12
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -7866,6 +7866,18 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
SimplifyDemandedBits(SDValue(N, 0)))
return SDValue(N, 0);
// (trunc adde(X, Y, Carry)) -> (adde trunc(X), trunc(Y), Carry)
// When the adde's carry is not used.
if (N0.getOpcode() == ISD::ADDE && N0.hasOneUse() &&
!N0.getNode()->hasAnyUseOfValue(1) &&
(!LegalOperations || TLI.isOperationLegal(ISD::ADDE, VT))) {
SDLoc SL(N);
auto X = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(0));
auto Y = DAG.getNode(ISD::TRUNCATE, SL, VT, N0.getOperand(1));
return DAG.getNode(ISD::ADDE, SL, DAG.getVTList(VT, MVT::Glue),
X, Y, N0.getOperand(2));
}
return SDValue();
}

11
llvm/test/CodeGen/X86/adde-carry.ll
View File

@ -28,8 +28,7 @@ define void @b(i32* nocapture %r, i64 %a, i64 %b, i32 %c) nounwind {
; CHECK-LABEL: b:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: sbbq %rax, %rax
; CHECK-NEXT: subl %eax, %ecx
; CHECK-NEXT: adcl $0, %ecx
; CHECK-NEXT: movl %ecx, (%rdi)
; CHECK-NEXT: retq
entry:
@ -48,8 +47,7 @@ define void @c(i16* nocapture %r, i64 %a, i64 %b, i16 %c) nounwind {
; CHECK-LABEL: c:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: sbbq %rax, %rax
; CHECK-NEXT: subl %eax, %ecx
; CHECK-NEXT: adcl $0, %ecx
; CHECK-NEXT: movw %cx, (%rdi)
; CHECK-NEXT: retq
entry:
@ -68,8 +66,7 @@ define void @d(i8* nocapture %r, i64 %a, i64 %b, i8 %c) nounwind {
; CHECK-LABEL: d:
; CHECK: # BB#0: # %entry
; CHECK-NEXT: addq %rdx, %rsi
; CHECK-NEXT: sbbq %rax, %rax
; CHECK-NEXT: subl %eax, %ecx
; CHECK-NEXT: adcl $0, %ecx
; CHECK-NEXT: movb %cl, (%rdi)
; CHECK-NEXT: retq
entry:
@ -165,8 +162,8 @@ define void @muladd(%accumulator* nocapture %this, i64 %arg.a, i64 %arg.b) {
; CHECK-NEXT: adcq $0, %rdx
; CHECK-NEXT: movq %rax, (%rdi)
; CHECK-NEXT: addq 8(%rdi), %rdx
; CHECK-NEXT: sbbq %rax, %rax
; CHECK-NEXT: movq %rdx, 8(%rdi)
; CHECK-NEXT: sbbl %eax, %eax
; CHECK-NEXT: subl %eax, 16(%rdi)
; CHECK-NEXT: retq
entry:

3
llvm/test/CodeGen/X86/known-bits.ll
View File

@ -151,8 +151,7 @@ define i128 @knownbits_mask_addc_shl(i64 %a0, i64 %a1, i64 %a2) nounwind {
; X64-NEXT: andq $-1024, %rdi # imm = 0xFC00
; X64-NEXT: andq $-1024, %rsi # imm = 0xFC00
; X64-NEXT: addq %rdi, %rsi
; X64-NEXT: sbbq %rax, %rax
; X64-NEXT: subl %eax, %edx
; X64-NEXT: adcl $0, %edx
; X64-NEXT: shldq $54, %rsi, %rdx
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq