forked from OSchip/llvm-project
[CGP] add specialization for memcmp expansion with only one basic block
llvm-svn: 306485
This commit is contained in:
Sanjay Patel
parent
c5fa6358ba
commit
4b23fa0abf
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@ -1679,6 +1679,7 @@ class MemCmpExpansion {
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void emitMemCmpResultBlock();
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Value *getMemCmpExpansionZeroCase(unsigned Size);
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Value *getMemCmpEqZeroOneBlock(unsigned Size);
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Value *getMemCmpOneBlock(unsigned Size);
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unsigned getLoadSize(unsigned Size);
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unsigned getNumLoads(unsigned Size);
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@ -1711,7 +1712,7 @@ MemCmpExpansion::MemCmpExpansion(CallInst *CI, uint64_t Size,
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// we choose to handle this case too to avoid fragmented lowering.
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IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI);
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NumBlocks = calculateNumBlocks(Size);
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if (!IsUsedForZeroCmp || NumBlocks != 1) {
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if ((!IsUsedForZeroCmp && NumLoadsPerBlock != 1) || NumBlocks != 1) {
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BasicBlock *StartBlock = CI->getParent();
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EndBlock = StartBlock->splitBasicBlock(CI, "endblock");
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setupEndBlockPHINodes();
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@ -2090,6 +2091,41 @@ Value *MemCmpExpansion::getMemCmpEqZeroOneBlock(unsigned Size) {
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return Builder.CreateZExt(Cmp, Type::getInt32Ty(CI->getContext()));
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}
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/// A memcmp expansion that only has one block of load and compare can bypass
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/// the compare, branch, and phi IR that is required in the general case.
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Value *MemCmpExpansion::getMemCmpOneBlock(unsigned Size) {
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assert(NumLoadsPerBlock == 1 && "Only handles one load pair per block");
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Type *LoadSizeType = IntegerType::get(CI->getContext(), Size * 8);
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Value *Source1 = CI->getArgOperand(0);
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Value *Source2 = CI->getArgOperand(1);
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// Cast source to LoadSizeType*.
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if (Source1->getType() != LoadSizeType)
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Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
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if (Source2->getType() != LoadSizeType)
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Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
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// Load LoadSizeType from the base address.
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Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
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Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
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if (DL.isLittleEndian() && Size != 1) {
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Function *Bswap = Intrinsic::getDeclaration(CI->getModule(),
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Intrinsic::bswap, LoadSizeType);
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LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);
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LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);
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}
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// TODO: Instead of comparing ULT, just subtract and return the difference?
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Value *CmpNE = Builder.CreateICmpNE(LoadSrc1, LoadSrc2);
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Value *CmpULT = Builder.CreateICmpULT(LoadSrc1, LoadSrc2);
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Type *I32 = Builder.getInt32Ty();
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Value *Sel1 = Builder.CreateSelect(CmpULT, ConstantInt::get(I32, -1),
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ConstantInt::get(I32, 1));
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return Builder.CreateSelect(CmpNE, Sel1, ConstantInt::get(I32, 0));
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}
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// This function expands the memcmp call into an inline expansion and returns
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// the memcmp result.
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Value *MemCmpExpansion::getMemCmpExpansion(uint64_t Size) {
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@ -2097,6 +2133,10 @@ Value *MemCmpExpansion::getMemCmpExpansion(uint64_t Size) {
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return NumBlocks == 1 ? getMemCmpEqZeroOneBlock(Size) :
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getMemCmpExpansionZeroCase(Size);
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// TODO: Handle more than one load pair per block in getMemCmpOneBlock().
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if (NumBlocks == 1 && NumLoadsPerBlock == 1)
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return getMemCmpOneBlock(Size);
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// This loop calls emitLoadCompareBlock for comparing Size bytes of the two
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// memcmp sources. It starts with loading using the maximum load size set by
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// the target. It processes any remaining bytes using a load size which is the
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@ -13,11 +13,10 @@ entry:
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; CHECK: ldbrx [[LOAD1:[0-9]+]]
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; CHECK-NEXT: ldbrx [[LOAD2:[0-9]+]]
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; CHECK-NEXT: li [[LI:[0-9]+]], 1
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; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: li [[LI2:[0-9]+]], -1
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; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
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; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
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; CHECK-NEXT: extsw 3, [[ISEL2]]
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; CHECK-NEXT: blr
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}
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@ -34,11 +33,10 @@ entry:
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; CHECK: lwbrx [[LOAD1:[0-9]+]]
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; CHECK-NEXT: lwbrx [[LOAD2:[0-9]+]]
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; CHECK-NEXT: li [[LI:[0-9]+]], 1
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; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: li [[LI2:[0-9]+]], -1
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; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
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; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
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; CHECK-NEXT: extsw 3, [[ISEL2]]
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; CHECK-NEXT: blr
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}
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@ -55,11 +53,10 @@ entry:
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; CHECK: lhbrx [[LOAD1:[0-9]+]]
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; CHECK-NEXT: lhbrx [[LOAD2:[0-9]+]]
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; CHECK-NEXT: li [[LI:[0-9]+]], 1
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; CHECK-NEXT: cmpld [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: li [[LI2:[0-9]+]], -1
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; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
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; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
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; CHECK-NEXT: extsw 3, [[ISEL2]]
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; CHECK-NEXT: blr
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}
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@ -75,8 +72,11 @@ entry:
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; CHECK-LABEL: @test4
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; CHECK: lbz [[LOAD1:[0-9]+]]
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; CHECK-NEXT: lbz [[LOAD2:[0-9]+]]
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; CHECK-NEXT: subf [[SUB:[0-9]+]], [[LOAD2]], [[LOAD1]]
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; CHECK-NEXT: extsw 3, [[SUB]]
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; CHECK-NEXT: li [[LI:[0-9]+]], 1
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; CHECK-NEXT: li [[LI2:[0-9]+]], -1
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; CHECK-NEXT: cmplw [[LOAD1]], [[LOAD2]]
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; CHECK-NEXT: isel [[ISEL:[0-9]+]], [[LI2]], [[LI]], 0
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; CHECK-NEXT: isel [[ISEL2:[0-9]+]], 0, [[ISEL]], 2
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; CHECK-NEXT: blr
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}
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@ -59,28 +59,20 @@ define signext i32 @test2(i32* nocapture readonly %buffer1, i32* nocapture reado
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; CHECK-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
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; CHECK-NEXT: [[BSWAP1:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD1]])
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; CHECK-NEXT: [[BSWAP2:%[0-9]+]] = call i32 @llvm.bswap.i32(i32 [[LOAD2]])
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; CHECK-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[BSWAP1]] to i64
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; CHECK-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[BSWAP2]] to i64
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; CHECK-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
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; CHECK-NEXT: br i1 [[ICMP]], label %endblock, label %res_block
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; CHECK-LABEL: res_block:{{.*}}
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; CHECK: [[ICMP2:%[0-9]+]] = icmp ult i64
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; CHECK-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
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; CHECK-NEXT: br label %endblock
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; CHECK-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[BSWAP1]], [[BSWAP2]]
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; CHECK-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[BSWAP1]], [[BSWAP2]]
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; CHECK-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1
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; CHECK-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0
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; CHECK-NEXT: ret i32 [[SELECT2]]
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; CHECK-BE-LABEL: @test2(
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; CHECK-BE: [[LOAD1:%[0-9]+]] = load i32, i32*
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; CHECK-BE-NEXT: [[LOAD2:%[0-9]+]] = load i32, i32*
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; CHECK-BE-NEXT: [[ZEXT1:%[0-9]+]] = zext i32 [[LOAD1]] to i64
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; CHECK-BE-NEXT: [[ZEXT2:%[0-9]+]] = zext i32 [[LOAD2]] to i64
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; CHECK-BE-NEXT: [[ICMP:%[0-9]+]] = icmp eq i64 [[ZEXT1]], [[ZEXT2]]
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; CHECK-BE-NEXT: br i1 [[ICMP]], label %endblock, label %res_block
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; CHECK-BE-LABEL: res_block:{{.*}}
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; CHECK-BE: [[ICMP2:%[0-9]+]] = icmp ult i64
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; CHECK-BE-NEXT: [[SELECT:%[0-9]+]] = select i1 [[ICMP2]], i32 -1, i32 1
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; CHECK-BE-NEXT: br label %endblock
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; CHECK-BE-NEXT: [[CMP1:%[0-9]+]] = icmp ne i32 [[LOAD1]], [[LOAD2]]
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; CHECK-BE-NEXT: [[CMP2:%[0-9]+]] = icmp ult i32 [[LOAD1]], [[LOAD2]]
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; CHECK-BE-NEXT: [[SELECT1:%[0-9]+]] = select i1 [[CMP2]], i32 -1, i32 1
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; CHECK-BE-NEXT: [[SELECT2:%[0-9]+]] = select i1 [[CMP1]], i32 [[SELECT1]], i32 0
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; CHECK-BE-NEXT: ret i32 [[SELECT2]]
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entry:
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%0 = bitcast i32* %buffer1 to i8*
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@ -12,42 +12,39 @@ declare i32 @memcmp(i8*, i8*, i64)
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define i32 @length2(i8* %X, i8* %Y) nounwind {
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; X32-LABEL: length2:
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; X32: # BB#0: # %loadbb
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movzwl (%ecx), %ecx
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; X32-NEXT: movzwl (%eax), %eax
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; X32-NEXT: rolw $8, %cx
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; X32-NEXT: rolw $8, %ax
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; X32-NEXT: movzwl %cx, %ecx
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; X32-NEXT: movzwl %ax, %edx
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: cmpl %edx, %ecx
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; X32-NEXT: je .LBB0_3
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; X32-NEXT: # BB#1: # %res_block
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; X32-NEXT: cmpw %ax, %cx
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; X32-NEXT: movl $-1, %eax
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; X32-NEXT: jb .LBB0_3
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; X32-NEXT: # BB#2: # %res_block
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; X32-NEXT: jae .LBB0_1
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; X32-NEXT: # BB#2:
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; X32-NEXT: je .LBB0_3
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; X32-NEXT: .LBB0_4:
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; X32-NEXT: retl
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; X32-NEXT: .LBB0_1:
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; X32-NEXT: movl $1, %eax
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; X32-NEXT: .LBB0_3: # %endblock
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; X32-NEXT: jne .LBB0_4
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; X32-NEXT: .LBB0_3:
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: length2:
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; X64: # BB#0: # %loadbb
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; X64: # BB#0:
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; X64-NEXT: movzwl (%rdi), %eax
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; X64-NEXT: movzwl (%rsi), %ecx
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; X64-NEXT: rolw $8, %ax
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; X64-NEXT: rolw $8, %cx
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; X64-NEXT: movzwl %ax, %edx
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; X64-NEXT: movzwl %cx, %ecx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpq %rcx, %rdx
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; X64-NEXT: je .LBB0_2
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; X64-NEXT: # BB#1: # %res_block
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: cmpw %cx, %ax
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: .LBB0_2: # %endblock
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; X64-NEXT: cmovel %edx, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 2) nounwind
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ret i32 %m
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@ -169,38 +166,39 @@ define i1 @length3_eq(i8* %X, i8* %Y) nounwind {
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define i32 @length4(i8* %X, i8* %Y) nounwind {
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; X32-LABEL: length4:
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; X32: # BB#0: # %loadbb
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl (%ecx), %ecx
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; X32-NEXT: movl (%eax), %edx
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: bswapl %ecx
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; X32-NEXT: bswapl %edx
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: cmpl %edx, %ecx
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; X32-NEXT: je .LBB6_3
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; X32-NEXT: # BB#1: # %res_block
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; X32-NEXT: bswapl %eax
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; X32-NEXT: cmpl %eax, %ecx
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; X32-NEXT: movl $-1, %eax
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; X32-NEXT: jb .LBB6_3
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; X32-NEXT: # BB#2: # %res_block
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; X32-NEXT: jae .LBB6_1
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; X32-NEXT: # BB#2:
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; X32-NEXT: je .LBB6_3
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; X32-NEXT: .LBB6_4:
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; X32-NEXT: retl
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; X32-NEXT: .LBB6_1:
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; X32-NEXT: movl $1, %eax
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; X32-NEXT: .LBB6_3: # %endblock
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; X32-NEXT: jne .LBB6_4
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; X32-NEXT: .LBB6_3:
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; X32-NEXT: xorl %eax, %eax
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; X32-NEXT: retl
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;
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; X64-LABEL: length4:
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; X64: # BB#0: # %loadbb
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; X64-NEXT: movl (%rdi), %ecx
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; X64-NEXT: movl (%rsi), %edx
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; X64: # BB#0:
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; X64-NEXT: movl (%rdi), %eax
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; X64-NEXT: movl (%rsi), %ecx
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; X64-NEXT: bswapl %eax
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; X64-NEXT: bswapl %ecx
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; X64-NEXT: bswapl %edx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpq %rdx, %rcx
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; X64-NEXT: je .LBB6_2
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; X64-NEXT: # BB#1: # %res_block
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: cmpl %ecx, %eax
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: .LBB6_2: # %endblock
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; X64-NEXT: cmovel %edx, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 4) nounwind
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ret i32 %m
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@ -303,19 +301,17 @@ define i32 @length8(i8* %X, i8* %Y) nounwind {
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; X32-NEXT: retl
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;
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; X64-LABEL: length8:
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; X64: # BB#0: # %loadbb
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; X64-NEXT: movq (%rdi), %rcx
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; X64-NEXT: movq (%rsi), %rdx
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; X64: # BB#0:
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; X64-NEXT: movq (%rdi), %rax
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; X64-NEXT: movq (%rsi), %rcx
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; X64-NEXT: bswapq %rax
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; X64-NEXT: bswapq %rcx
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; X64-NEXT: bswapq %rdx
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; X64-NEXT: xorl %eax, %eax
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; X64-NEXT: cmpq %rdx, %rcx
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; X64-NEXT: je .LBB11_2
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; X64-NEXT: # BB#1: # %res_block
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: cmpq %rcx, %rax
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; X64-NEXT: movl $-1, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovbl %ecx, %eax
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; X64-NEXT: .LBB11_2: # %endblock
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; X64-NEXT: cmovel %edx, %eax
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; X64-NEXT: retq
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%m = tail call i32 @memcmp(i8* %X, i8* %Y, i64 8) nounwind
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ret i32 %m
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@ -4,45 +4,18 @@
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declare i32 @memcmp(i8* nocapture, i8* nocapture, i64)
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define i32 @cmp2(i8* nocapture readonly %x, i8* nocapture readonly %y) {
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; X32-LABEL: @cmp2(
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; X32-NEXT: loadbb:
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; X32-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i16*
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; X32-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i16*
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; X32-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]]
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; X32-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
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; X32-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
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; X32-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
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; X32-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i32
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; X32-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i32
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; X32-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP6]], [[TMP7]]
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; X32-NEXT: br i1 [[TMP8]], label %endblock, label %res_block
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; X32: res_block:
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; X32-NEXT: [[TMP9:%.*]] = icmp ult i32 [[TMP6]], [[TMP7]]
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; X32-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
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; X32-NEXT: br label %endblock
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; X32: endblock:
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; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP10]], %res_block ]
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; X32-NEXT: ret i32 [[PHI_RES]]
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;
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; X64-LABEL: @cmp2(
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; X64-NEXT: loadbb:
|
||||
; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i16*
|
||||
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i16*
|
||||
; X64-NEXT: [[TMP2:%.*]] = load i16, i16* [[TMP0]]
|
||||
; X64-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
|
||||
; X64-NEXT: [[TMP4:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP2]])
|
||||
; X64-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
|
||||
; X64-NEXT: [[TMP6:%.*]] = zext i16 [[TMP4]] to i64
|
||||
; X64-NEXT: [[TMP7:%.*]] = zext i16 [[TMP5]] to i64
|
||||
; X64-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
|
||||
; X64-NEXT: br i1 [[TMP8]], label %endblock, label %res_block
|
||||
; X64: res_block:
|
||||
; X64-NEXT: [[TMP9:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
|
||||
; X64-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
|
||||
; X64-NEXT: br label %endblock
|
||||
; X64: endblock:
|
||||
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP10]], %res_block ]
|
||||
; X64-NEXT: ret i32 [[PHI_RES]]
|
||||
; ALL-LABEL: @cmp2(
|
||||
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i16*
|
||||
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i16*
|
||||
; ALL-NEXT: [[TMP3:%.*]] = load i16, i16* [[TMP1]]
|
||||
; ALL-NEXT: [[TMP4:%.*]] = load i16, i16* [[TMP2]]
|
||||
; ALL-NEXT: [[TMP5:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP3]])
|
||||
; ALL-NEXT: [[TMP6:%.*]] = call i16 @llvm.bswap.i16(i16 [[TMP4]])
|
||||
; ALL-NEXT: [[TMP7:%.*]] = icmp ne i16 [[TMP5]], [[TMP6]]
|
||||
; ALL-NEXT: [[TMP8:%.*]] = icmp ult i16 [[TMP5]], [[TMP6]]
|
||||
; ALL-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
|
||||
; ALL-NEXT: [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
|
||||
; ALL-NEXT: ret i32 [[TMP10]]
|
||||
;
|
||||
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 2)
|
||||
ret i32 %call
|
||||
|
|
@ -58,43 +31,18 @@ define i32 @cmp3(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
|||
}
|
||||
|
||||
define i32 @cmp4(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
||||
; X32-LABEL: @cmp4(
|
||||
; X32-NEXT: loadbb:
|
||||
; X32-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i32*
|
||||
; X32-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i32*
|
||||
; X32-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]]
|
||||
; X32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
|
||||
; X32-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
|
||||
; X32-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
|
||||
; X32-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP4]], [[TMP5]]
|
||||
; X32-NEXT: br i1 [[TMP6]], label %endblock, label %res_block
|
||||
; X32: res_block:
|
||||
; X32-NEXT: [[TMP7:%.*]] = icmp ult i32 [[TMP4]], [[TMP5]]
|
||||
; X32-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
|
||||
; X32-NEXT: br label %endblock
|
||||
; X32: endblock:
|
||||
; X32-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP8]], %res_block ]
|
||||
; X32-NEXT: ret i32 [[PHI_RES]]
|
||||
;
|
||||
; X64-LABEL: @cmp4(
|
||||
; X64-NEXT: loadbb:
|
||||
; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i32*
|
||||
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i32*
|
||||
; X64-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP0]]
|
||||
; X64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
|
||||
; X64-NEXT: [[TMP4:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP2]])
|
||||
; X64-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
|
||||
; X64-NEXT: [[TMP6:%.*]] = zext i32 [[TMP4]] to i64
|
||||
; X64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP5]] to i64
|
||||
; X64-NEXT: [[TMP8:%.*]] = icmp eq i64 [[TMP6]], [[TMP7]]
|
||||
; X64-NEXT: br i1 [[TMP8]], label %endblock, label %res_block
|
||||
; X64: res_block:
|
||||
; X64-NEXT: [[TMP9:%.*]] = icmp ult i64 [[TMP6]], [[TMP7]]
|
||||
; X64-NEXT: [[TMP10:%.*]] = select i1 [[TMP9]], i32 -1, i32 1
|
||||
; X64-NEXT: br label %endblock
|
||||
; X64: endblock:
|
||||
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP10]], %res_block ]
|
||||
; X64-NEXT: ret i32 [[PHI_RES]]
|
||||
; ALL-LABEL: @cmp4(
|
||||
; ALL-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i32*
|
||||
; ALL-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i32*
|
||||
; ALL-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP1]]
|
||||
; ALL-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP2]]
|
||||
; ALL-NEXT: [[TMP5:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP3]])
|
||||
; ALL-NEXT: [[TMP6:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP4]])
|
||||
; ALL-NEXT: [[TMP7:%.*]] = icmp ne i32 [[TMP5]], [[TMP6]]
|
||||
; ALL-NEXT: [[TMP8:%.*]] = icmp ult i32 [[TMP5]], [[TMP6]]
|
||||
; ALL-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
|
||||
; ALL-NEXT: [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
|
||||
; ALL-NEXT: ret i32 [[TMP10]]
|
||||
;
|
||||
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 4)
|
||||
ret i32 %call
|
||||
|
|
@ -133,22 +81,17 @@ define i32 @cmp8(i8* nocapture readonly %x, i8* nocapture readonly %y) {
|
|||
; X32-NEXT: ret i32 [[CALL]]
|
||||
;
|
||||
; X64-LABEL: @cmp8(
|
||||
; X64-NEXT: loadbb:
|
||||
; X64-NEXT: [[TMP0:%.*]] = bitcast i8* %x to i64*
|
||||
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %y to i64*
|
||||
; X64-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP0]]
|
||||
; X64-NEXT: [[TMP1:%.*]] = bitcast i8* %x to i64*
|
||||
; X64-NEXT: [[TMP2:%.*]] = bitcast i8* %y to i64*
|
||||
; X64-NEXT: [[TMP3:%.*]] = load i64, i64* [[TMP1]]
|
||||
; X64-NEXT: [[TMP4:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP2]])
|
||||
; X64-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP2]]
|
||||
; X64-NEXT: [[TMP5:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP3]])
|
||||
; X64-NEXT: [[TMP6:%.*]] = icmp eq i64 [[TMP4]], [[TMP5]]
|
||||
; X64-NEXT: br i1 [[TMP6]], label %endblock, label %res_block
|
||||
; X64: res_block:
|
||||
; X64-NEXT: [[TMP7:%.*]] = icmp ult i64 [[TMP4]], [[TMP5]]
|
||||
; X64-NEXT: [[TMP8:%.*]] = select i1 [[TMP7]], i32 -1, i32 1
|
||||
; X64-NEXT: br label %endblock
|
||||
; X64: endblock:
|
||||
; X64-NEXT: [[PHI_RES:%.*]] = phi i32 [ 0, %loadbb ], [ [[TMP8]], %res_block ]
|
||||
; X64-NEXT: ret i32 [[PHI_RES]]
|
||||
; X64-NEXT: [[TMP6:%.*]] = call i64 @llvm.bswap.i64(i64 [[TMP4]])
|
||||
; X64-NEXT: [[TMP7:%.*]] = icmp ne i64 [[TMP5]], [[TMP6]]
|
||||
; X64-NEXT: [[TMP8:%.*]] = icmp ult i64 [[TMP5]], [[TMP6]]
|
||||
; X64-NEXT: [[TMP9:%.*]] = select i1 [[TMP8]], i32 -1, i32 1
|
||||
; X64-NEXT: [[TMP10:%.*]] = select i1 [[TMP7]], i32 [[TMP9]], i32 0
|
||||
; X64-NEXT: ret i32 [[TMP10]]
|
||||
;
|
||||
%call = tail call i32 @memcmp(i8* %x, i8* %y, i64 8)
|
||||
ret i32 %call
|
||||
|
|
|
|||
Loading…
Reference in New Issue