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[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests 

llvm-svn: 288910
This commit is contained in:
Simon Pilgrim 2016-12-07 15:06:14 +00:00
parent 364da7e527
commit 4b1ebf97fc
4 changed files with 22 additions and 14 deletions
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10
llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
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@ -893,10 +893,12 @@ define i32 @stack_fold_extractps(<4 x float> %a0) {
;CHECK-LABEL: stack_fold_extractps
;CHECK: vextractps $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
%1 = extractelement <4 x float> %a0, i32 1
%2 = bitcast float %1 to i32
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
; fadd forces execution domain
%1 = fadd <4 x float> %a0, <float 1.0, float 2.0, float 3.0, float 4.0>
%2 = extractelement <4 x float> %1, i32 1
%3 = bitcast float %2 to i32
%4 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %3
}
define <2 x double> @stack_fold_haddpd(<2 x double> %a0, <2 x double> %a1) {

10
llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
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@ -613,10 +613,12 @@ define i32 @stack_fold_extractps(<4 x float> %a0) {
;CHECK-LABEL: stack_fold_extractps
;CHECK: extractps $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
%1 = extractelement <4 x float> %a0, i32 1
%2 = bitcast float %1 to i32
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
; fadd forces execution domain
%1 = fadd <4 x float> %a0, <float 1.0, float 2.0, float 3.0, float 4.0>
%2 = extractelement <4 x float> %1, i32 1
%3 = bitcast float %2 to i32
%4 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %3
}
define <2 x double> @stack_fold_haddpd(<2 x double> %a0, <2 x double> %a1) {

8
llvm/test/CodeGen/X86/stack-folding-int-avx1.ll
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@ -430,9 +430,11 @@ define i32 @stack_fold_pextrd(<4 x i32> %a0) {
;CHECK-LABEL: stack_fold_pextrd
;CHECK: pextrd $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
%1 = extractelement <4 x i32> %a0, i32 1
%2 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %1
; add forces execution domain
%1 = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
%2 = extractelement <4 x i32> %1, i32 1
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
}
define i64 @stack_fold_pextrq(<2 x i64> %a0) {

8
llvm/test/CodeGen/X86/stack-folding-int-sse42.ll
View File

@ -457,9 +457,11 @@ define i32 @stack_fold_pextrd(<4 x i32> %a0) {
;CHECK-LABEL: stack_fold_pextrd
;CHECK: pextrd $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
;CHECK: movl {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
%1 = extractelement <4 x i32> %a0, i32 1
%2 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %1
; add forces execution domain
%1 = add <4 x i32> %a0, <i32 1, i32 2, i32 3, i32 4>
%2 = extractelement <4 x i32> %1, i32 1
%3 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
ret i32 %2
}
define i64 @stack_fold_pextrq(<2 x i64> %a0) {