forked from OSchip/llvm-project
hasThumb2() does not mean we are compiling for thumb, must also check isThumb().
llvm-svn: 75660
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@ -902,7 +902,8 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
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return CurDAG->SelectNodeTo(N, ARM::tADDrSPi, MVT::i32, TFI,
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return CurDAG->SelectNodeTo(N, ARM::tADDrSPi, MVT::i32, TFI,
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CurDAG->getTargetConstant(0, MVT::i32));
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CurDAG->getTargetConstant(0, MVT::i32));
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} else {
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} else {
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unsigned Opc = Subtarget->hasThumb2() ? ARM::t2ADDri : ARM::ADDri;
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unsigned Opc = ((Subtarget->isThumb() && Subtarget->hasThumb2()) ?
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ARM::t2ADDri : ARM::ADDri);
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SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32),
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SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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CurDAG->getRegister(0, MVT::i32) };
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CurDAG->getRegister(0, MVT::i32) };
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@ -941,7 +942,8 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
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CurDAG->getTargetConstant(ShImm, MVT::i32),
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CurDAG->getTargetConstant(ShImm, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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CurDAG->getRegister(0, MVT::i32) };
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CurDAG->getRegister(0, MVT::i32) };
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return CurDAG->SelectNodeTo(N, (Subtarget->hasThumb2()) ?
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return CurDAG->SelectNodeTo(N, (Subtarget->isThumb() &&
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Subtarget->hasThumb2()) ?
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ARM::t2ADDrs : ARM::ADDrs, MVT::i32, Ops, 7);
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ARM::t2ADDrs : ARM::ADDrs, MVT::i32, Ops, 7);
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}
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}
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if (isPowerOf2_32(RHSV+1)) { // 2^n-1?
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if (isPowerOf2_32(RHSV+1)) { // 2^n-1?
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@ -951,7 +953,8 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
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CurDAG->getTargetConstant(ShImm, MVT::i32),
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CurDAG->getTargetConstant(ShImm, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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getAL(CurDAG), CurDAG->getRegister(0, MVT::i32),
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CurDAG->getRegister(0, MVT::i32) };
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CurDAG->getRegister(0, MVT::i32) };
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return CurDAG->SelectNodeTo(N, (Subtarget->hasThumb2()) ?
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return CurDAG->SelectNodeTo(N, (Subtarget->isThumb() &&
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Subtarget->hasThumb2()) ?
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ARM::t2RSBrs : ARM::RSBrs, MVT::i32, Ops, 7);
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ARM::t2RSBrs : ARM::RSBrs, MVT::i32, Ops, 7);
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}
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}
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}
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}
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