forked from OSchip/llvm-project
[x86] add cmov promotion tests for D36711; NFC
This way we can see what the current codegen looks like. I've also explicitly added/removed the cmov attribute from the RUN lines, so we know exactly what we're checking in the runs. llvm-svn: 311052
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=CMOV
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=NO_CMOV
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define i32 @cmov_zpromotion_16_to_32(i1 %c) {
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; CMOV-LABEL: cmov_zpromotion_16_to_32:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movzwl %cx, %eax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_zpromotion_16_to_32:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB0_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: .LBB0_2:
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; NO_CMOV-NEXT: movzwl %ax, %eax
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = zext i16 %t0 to i32
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ret i32 %ret
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}
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define i64 @cmov_zpromotion_16_to_64(i1 %c) {
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; CMOV-LABEL: cmov_zpromotion_16_to_64:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movzwl %cx, %eax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_zpromotion_16_to_64:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB1_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: .LBB1_2:
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; NO_CMOV-NEXT: movzwl %ax, %eax
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; NO_CMOV-NEXT: xorl %edx, %edx
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = zext i16 %t0 to i64
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ret i64 %ret
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}
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define i32 @cmov_spromotion_16_to_32(i1 %c) {
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; CMOV-LABEL: cmov_spromotion_16_to_32:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movswl %cx, %eax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_spromotion_16_to_32:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB2_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: .LBB2_2:
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; NO_CMOV-NEXT: cwtl
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = sext i16 %t0 to i32
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ret i32 %ret
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}
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define i64 @cmov_spromotion_16_to_64(i1 %c) {
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; CMOV-LABEL: cmov_spromotion_16_to_64:
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; CMOV: # BB#0:
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; CMOV-NEXT: testb $1, %dil
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; CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; CMOV-NEXT: movw $-1, %cx
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; CMOV-NEXT: cmovnew %ax, %cx
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; CMOV-NEXT: movswq %cx, %rax
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; CMOV-NEXT: retq
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;
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; NO_CMOV-LABEL: cmov_spromotion_16_to_64:
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; NO_CMOV: # BB#0:
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; NO_CMOV-NEXT: testb $1, {{[0-9]+}}(%esp)
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; NO_CMOV-NEXT: movw $12414, %ax # imm = 0x307E
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; NO_CMOV-NEXT: jne .LBB3_2
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; NO_CMOV-NEXT: # BB#1:
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; NO_CMOV-NEXT: movw $-1, %ax
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; NO_CMOV-NEXT: .LBB3_2:
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; NO_CMOV-NEXT: cwtl
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; NO_CMOV-NEXT: movl %eax, %edx
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; NO_CMOV-NEXT: sarl $31, %edx
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; NO_CMOV-NEXT: retl
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%t0 = select i1 %c, i16 12414, i16 -1
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%ret = sext i16 %t0 to i64
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ret i64 %ret
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}
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