forked from OSchip/llvm-project
parent
fd6ed1ea6b
commit
4ab6e7324a
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@ -321,7 +321,7 @@ class ARMAsmParser : public MCTargetAsmParser {
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const SmallVectorImpl<MCParsedAsmOperand*> &);
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void cvtThumbBranches(MCInst &Inst,
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const SmallVectorImpl<MCParsedAsmOperand*> &);
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bool validateInstruction(MCInst &Inst,
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const SmallVectorImpl<MCParsedAsmOperand*> &Ops);
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bool processInstruction(MCInst &Inst,
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@ -3598,7 +3598,7 @@ parseMemBarrierOptOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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Error(Loc, "illegal expression");
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return MatchOperand_ParseFail;
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}
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(MemBarrierID);
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if (!CE) {
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Error(Loc, "constant expression expected");
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@ -4197,7 +4197,7 @@ parseAM3Offset(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
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isAdd = false;
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haveEaten = true;
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}
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Tok = Parser.getTok();
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int Reg = tryParseRegister();
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if (Reg == -1) {
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@ -4270,7 +4270,7 @@ cvtThumbBranches(MCInst &Inst,
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break;
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}
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}
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// now decide on encoding size based on branch target range
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switch(Inst.getOpcode()) {
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// classify tB as either t2B or t1B based on range of immediate operand
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