forked from OSchip/llvm-project
[AArch64][GlobalISel] Add some more legal types for G_PHI, G_IMPLICIT_DEF, G_FREEZE.
Also use this opportunity start to clean up the mess of vector type lists we have in the LegalizerInfo. Unfortunately since the legalizer rule builders require std::initializer_list objects as parameters we can't programmatically generate the type lists.
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@ -54,6 +54,12 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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const LLT v2s64 = LLT::vector(2, 64);
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const LLT v2p0 = LLT::vector(2, p0);
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const auto PackedVectorAllTypeList = {/* Begin 128bit types */
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v16s8, v8s16, v4s32, v2s64, v2p0,
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/* End 128bit types */
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/* Begin 64bit types */
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v8s8, v4s16, v2s32};
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const TargetMachine &TM = ST.getTargetLowering()->getTargetMachine();
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// FIXME: support subtargets which have neon/fp-armv8 disabled.
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@ -63,7 +69,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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}
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getActionDefinitionsBuilder({G_IMPLICIT_DEF, G_FREEZE})
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.legalFor({p0, s1, s8, s16, s32, s64, v2s32, v4s32, v2s64, v16s8, v8s16})
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.legalFor({p0, s1, s8, s16, s32, s64})
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.legalFor(PackedVectorAllTypeList)
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.clampScalar(0, s1, s64)
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.widenScalarToNextPow2(0, 8)
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.fewerElementsIf(
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@ -79,8 +86,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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return std::make_pair(0, EltTy);
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});
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getActionDefinitionsBuilder(G_PHI)
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.legalFor({p0, s16, s32, s64, v2s32, v4s32, v2s64})
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getActionDefinitionsBuilder(G_PHI).legalFor({p0, s16, s32, s64})
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.legalFor(PackedVectorAllTypeList)
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.clampScalar(0, s16, s64)
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.widenScalarToNextPow2(0);
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@ -1,5 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=aarch64 -run-pass=legalizer -O0 %s -o - | FileCheck %s
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# RUN: llc -march=aarch64 -run-pass=legalizer -global-isel-abort=1 -O0 %s -o - | FileCheck %s
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---
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name: test_freeze_s64
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body: |
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@ -67,3 +67,21 @@ body: |
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$w0 = COPY %1
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$w1 = COPY %2
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...
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---
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name: test_freeze_v8s8
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body: |
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bb.0:
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liveins: $d0
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; CHECK-LABEL: name: test_freeze_v8s8
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; CHECK: %d0:_(<8 x s8>) = COPY $d0
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; CHECK: [[FREEZE:%[0-9]+]]:_(<8 x s8>) = G_FREEZE %d0
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; CHECK: [[UV:%[0-9]+]]:_(<4 x s8>), [[UV1:%[0-9]+]]:_(<4 x s8>) = G_UNMERGE_VALUES [[FREEZE]](<8 x s8>)
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; CHECK: $w0 = COPY [[UV]](<4 x s8>)
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; CHECK: $w1 = COPY [[UV1]](<4 x s8>)
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%d0:_(<8 x s8>) = COPY $d0
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%0:_(<8 x s8>) = G_FREEZE %d0
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%1:_(<4 x s8>), %2:_(<4 x s8>) = G_UNMERGE_VALUES %0
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$w0 = COPY %1
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$w1 = COPY %2
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...
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@ -1,51 +1,5 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=aarch64-unknown-unknown -verify-machineinstrs -run-pass=legalizer %s -o - | FileCheck %s
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--- |
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; ModuleID = '/tmp/test.ll'
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source_filename = "/tmp/test.ll"
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-unknown"
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define i32 @legalize_phi(i32 %argc) {
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entry:
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ret i32 0
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}
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define i64* @legalize_phi_ptr(i64* %a, i64* %b, i1 %cond) {
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entry:
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ret i64* null
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}
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define i32 @legalize_phi_empty(i32 %argc) {
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entry:
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ret i32 0
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}
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define i32 @legalize_phi_loop(i32 %argc) {
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entry:
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ret i32 0
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}
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define i32 @legalize_phi_cycle(i32 %argc) {
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entry:
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ret i32 0
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}
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define i32 @legalize_phi_same_bb(i32 %argc) {
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entry:
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ret i32 0
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}
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define i32 @legalize_phi_diff_bb(i32 %argc, i32 %argc2) {
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entry:
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ret i32 0
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}
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define i32 @legalize_phi_check_insertpt(i64 %a) {
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entry:
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ret i32 0
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}
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...
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# RUN: llc -O0 -mtriple=aarch64-unknown-unknown -verify-machineinstrs -global-isel-abort=1 -run-pass=legalizer %s -o - | FileCheck %s
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---
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name: legalize_phi
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alignment: 4
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@ -610,7 +564,6 @@ regBankSelected: false
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selected: false
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tracksRegLiveness: true
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body: |
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; Check that the G_MERGE here gets inserted after all the PHIs.
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; CHECK-LABEL: name: legalize_phi_check_insertpt
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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@ -627,6 +580,7 @@ body: |
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; CHECK: G_STORE [[MV]](s128), [[COPY1]](p0) :: (store 16)
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; CHECK: G_STORE [[PHI2]](s64), [[COPY1]](p0) :: (store 8)
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; CHECK: RET_ReallyLR
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; Check that the G_MERGE here gets inserted after all the PHIs.
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bb.0:
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successors: %bb.1(0x40000000)
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liveins: $x0, $x1
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@ -644,3 +598,29 @@ body: |
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RET_ReallyLR
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...
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---
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name: legalize_phi_vector
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: legalize_phi_vector
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $q0, $x1
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; CHECK: [[COPY:%[0-9]+]]:_(<16 x s8>) = COPY $q0
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; CHECK: G_BR %bb.1
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; CHECK: bb.1:
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; CHECK: [[PHI:%[0-9]+]]:_(<16 x s8>) = G_PHI [[COPY]](<16 x s8>), %bb.0
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; CHECK: $q0 = COPY [[PHI]](<16 x s8>)
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; CHECK: RET_ReallyLR
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bb.0:
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successors: %bb.1
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liveins: $q0, $x1
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%0:_(<16 x s8>) = COPY $q0
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G_BR %bb.1
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bb.1:
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%3:_(<16 x s8>) = G_PHI %0(<16 x s8>), %bb.0
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$q0 = COPY %3(<16 x s8>)
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RET_ReallyLR
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...
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